For N layers, use approximately N/2 planes. Route all other signals and supplies as usual. Assign power rails to planes by priority.
For a 2-layer board, you have only one plane available (not even an unbroken one, at that). Ground is the first priority. Thus, all supplies get routed with traces. You'll use more bypass caps, because the trace inductance will be relatively high.
For 4 layers, GND takes priority, then VCC (for example, a conventional digital design where a 3.3 or 5V supply dominates). Other supplies, and signals, get routed as normal. If different sections require different supplies (e.g., a 12V analog section), the power plane can be split into zones, as needed.
For 8 layers, GND may again return to priority, so that you have 4 routing layers, 2 grounds and 2 supplies (maybe 3.3V VCCIO, and 1.8V or 2.5V for core or memory supply). Good grounding is always top priority.
Supplies on planes have excellent power quality, so that very few bypass caps are necessary. You certainly don't need a cap per pin, as some appnotes recommend.
If you like, the power supply network can be analyzed: simply convert trace lengths to inductances, capacitors to RLC series circuits (typically, an 0603 size 0.1uF capacitor, with two vias tying to internal planes, clocks in at 3nH ESL and 50mohm ESR), planes to (small) capacitors with little or no inductance, and so on. Plug this into SPICE and manipulate cap values, and types, until the impedance is stable and doesn't exhibit ringing.
Back to 2 layer boards. Note that you can't have an unbroken ground, in almost all cases. You inevitably need to cross traces, and those crossings must be done opposite the routing layer. Try to minimize crossings, and pour ground on top and bottom and stitch the pours liberally with vias, so that it all acts as one plane, that averages out as if it were a middle layer. Do not leave unconnected islands (they're better to remove altogether), and try to use two or more vias per island so there is a current path through the copper.
Tim