PCBWay issue with QFN solder bridge, what to do?

[VEGETA]

Hello,

I have TPS54394 IC with the QFN 16-pin package. PCBWay gave me this email:

Thank you for your order xxxx to PCBWAY. This is yyyy, your service representative.


After checking your file, we found that IC distance did not reach to 0.22mm, we can not  do the soldermask

bridge, Here are some solutions
1. Change IC distance to 0.22mm
2. With IC distance less than 0.22mm, we do not do soldermask bridge, but it will be easy short for assembly

and with a picture attached here.

What I understood is that they offer solder mask between pads up to just 0.2mm or 0.22mm but not less... my design IC have less (about 0.15mm) and they suggest that I either change the pad size or just remove solder mask between these sections.

I read that removing solder mask of tiny components is an ok behavior but wanted to verify.

this product will be manufactured to be soled later on, this time just a test board.

Note: my pads are the accurate size, solder mask on each pad is the same size as the pad. I have no problem with removing the solder mask bridge of that area if it helps.. and this product will never be manually soldered or assembled, all by fab house and assembler service.

best regards,

[ataradov]

It is fine, you can just tell them to proceed with manufacturing. They can't make reliable solder mask bridges, but in many cases they would be made. Some of them would likely break, some will stick.

I always keep those bridges in my gerbers. May be one out of 10 ties they would complain, other time they just make the board without asking.

For prototypes it does not matter, for mass production - you need to figure this out with your PCBA house.

[Feynman]

Are you sure your footprint is correct? In the picture it appears that the pads in x-direction have more distance to each other than the pads in y-direction.

[wraper]

There is something wrong with your footprint if you need 0.15 mm solder resist bridges for footprint with 0.65mm pin pitch. Even JLCPCB makes solder resist bridges for 0.5mm pitch QFN. I personally usually supply gerber files with 1th solder mask clearance and let the fab do their best by adjusting according to their process, instead of making larger on my side. Never received a complain that gap is below minimum allowed. Surprisingly usually they do much tighter gap than their websites claim. Also note that if pads are wider than they need to be, likely you will have solder bridging problems.

[ataradov]

On a second look, yes, the footprint looks busted.

TI site just made me hold a button for 10 second to prove that I'm not a bot. What a joke.

[wraper]

TI site just made me hold a button for 10 second to prove that I'm not a bot. What a joke.

Did not ask me anything but let me wait a whole minute while it checks I'm not a robot.

[wraper]

On a second look, yes, the footprint looks busted.

Looked on it again with more attention, horizontal and vertical pin pitch are different  .

[VEGETA]

Are you sure your footprint is correct? In the picture it appears that the pads in x-direction have more distance to each other than the pads in y-direction.

I downloaded it directly from TI, the link is via Ultralibrarian. Downloaded it again now to verify and it was the same one as I used.

However, I saw that in datasheet they are the same. 0.65mm between them, but the ones in other direction in the footprint I downloaded are 0.5mm.

[ataradov]

The footprint is wrong. This happens all the time with those library things.

[VEGETA]

The footprint is wrong. This happens all the time with those library things.

you are correct! footprint is wrong and I fixed it now by using

Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_ThermalVias

from kicad official library.

guys please check this one and give me feedback if it fits nicely, more eyes are better. I attached the snapshot.

[ataradov]

It looks fine. And given that PCBWay did not complain about other dimensions, you are likely to be fine with solder mask bridges.

[SiliconWizard]

Are you sure your footprint is correct? In the picture it appears that the pads in x-direction have more distance to each other than the pads in y-direction.

I downloaded it directly from TI, the link is via Ultralibrarian. Downloaded it again now to verify and it was the same one as I used.

I personally do not trust stuff from Ultralibrarian and SnapEDA. Usually not worth your time IME.

[VEGETA]

Are you sure your footprint is correct? In the picture it appears that the pads in x-direction have more distance to each other than the pads in y-direction.

well I have used many stuff from them but this was the first like this... and what makes me angry and disappointed is that TI themselves post this link in their own website. I wonder how could such a huge mistake pass through TI.
I downloaded it directly from TI, the link is via Ultralibrarian. Downloaded it again now to verify and it was the same one as I used.

I personally do not trust stuff from Ultralibrarian and SnapEDA. Usually not worth your time IME.

[wraper]

But you have too narrow solder resist bridges again. Reduce the gap between pads and solder mask.

[ataradov]

Thin outline around the pad is copper clearance, not solder mask. Solder mask is not shown here.

[VEGETA]

But you have too narrow solder resist bridges again. Reduce the gap between pads and solder mask.

Check the attached image from an online gerber viewer (not on my device right now). it shows the solder mask.

what you saw there in the previous image was for clearance not anything else.

To my surprise, pcbway doubled the board price because of using 0.2 minimum hole size rather than 0.3mm. I am not really sure what that is, but I never changed any hole or via size according to my memory. still waiting their reply.

and BTW, if I want to make say 100 of them and put them on say 5 panels or so... will that reduce the price to a noticeable amount?

[Zoli]

...
To my surprise, pcbway doubled the board price because of using 0.2 minimum hole size rather than 0.3mm. I am not really sure what that is, but I never changed any hole or via size according to my memory. still waiting their reply.
...

The thermal vias are 0.2mm.

[VEGETA]

...
To my surprise, pcbway doubled the board price because of using 0.2 minimum hole size rather than 0.3mm. I am not really sure what that is, but I never changed any hole or via size according to my memory. still waiting their reply.
...

The thermal vias are 0.2mm.

yes I figured this out earlier on and I just fixed it. made the holes of the newly chosen kicad footprint as 0.3mm for hole and 0.6 for pad. now waiting their response.

[ataradov]

To my surprise, pcbway doubled the board price because of using 0.2 minimum hole size rather than 0.3mm. I am not really sure what that is, but I never changed any hole or via size according to my memory. still waiting their reply.

Check the actual hole sizes. If you have any that are less than 0.3 mm, then you will be charged more. There is no need to wait for them.

EDIT: I see this is due to the footprint. I personally never use those footprints with embedded holes. It is not that hard to add a few vias that match your design on a PCB level. I also don't see why QFN-16 would need 9 vias. That's overkill.

and BTW, if I want to make say 100 of them and put them on say 5 panels or so... will that reduce the price to a noticeable amount?

You can do the online quote thing for this scenario and know the price instantly. $5 does not apply to large quantities, so the price depends on the board size and complexity. You can't extrapolate from $5 without knowing the details.

[VEGETA]

Looks like it went fine.

However, they got another question about those 9 through hole thermal vias. they want to know if they should cover them with resin or not. I told them not to, because I want good soldering connection to the thermal pad of the IC. is this correct?

they also mentioned putting resin in them will, you guessed it, increase cost..

[wraper]

Plugging vias prevent from solder sucking. However if vias are tented on opposite PCB side it's not a big issue, you just need to use a bit more solder paste on center pad.

[VEGETA]

Plugging vias prevent from solder sucking. However if vias are tented on opposite PCB side it's not a big issue, you just need to use a bit more solder paste on center pad.

they are not covered from any side and I don't require it to be so.

what dangers can this have? the vias are 0.3mm hole and 0.6mm pad size, 9 of them on 2.7x2.7 thermal pad which are all ground connections.

the 9 thermal vias connect the main regulator to the bottom layer huge ground pin. it is necessary to have nice connection between them and the IC.

check the attached picture that they sent, looks like it is the vias and solder paste layer.

[wraper]

Plugging vias prevent from solder sucking. However if vias are tented on opposite PCB side it's not a big issue, you just need to use a bit more solder paste on center pad.

they are not covered from any side and I don't require it to be so.

what dangers can this have?

All of the solder will flow to the bottom side through vias and barely any will remain between the chip and PCB. As chip will be pulled towards PCB by surface tension, solder from under the terminals will be squeezed out too and you may have bulging solder balls around terminals.

[VEGETA]

Plugging vias prevent from solder sucking. However if vias are tented on opposite PCB side it's not a big issue, you just need to use a bit more solder paste on center pad.

they are not covered from any side and I don't require it to be so.

what dangers can this have?

All of the solder will flow to the bottom side through vias and barely any will remain between the chip and PCB. As chip will be pulled towards PCB by surface tension, solder from under the terminals will be squeezed out too and you may have bulging solder balls around terminals.

so what to do in such cases? do all people tint or fill the vias all the times?

I mean, does filling them make solder conductivity less to the IC pad?

I will ask them about filling material and their prices to see.

[thm_w]

I always tent unless:
- want the ability to hand solder the QFN, by putting solder on top side, then put chip, then heating from bottom side with iron (time intensive)
- want extra thermal capability by adding solder to the vias (probably not a huge difference)

I wouldn't bother with filling, and you don't need to ask, the quote page gives ~$120 more for 2 layer plugged vias.