So ... my questions are:
- what common PCB tools can support a netlist to PCB flow?
- are any of you working this way?
My previous employer (which goes back 14 years now) used a home-grown text-based design entry instead of schematics. It was really quite a slick system, and scaled quite well to the quad-CPU VME boards that were the company's main products.
The system ran on a big SPARC (see recent thread about them!) server, so it ran on Solaris, and we used Emacs as the front end for design entry. A whole bunch of Emacs LISP code implemented the necessary features. It depended on things being in specific locations in the file system, because the Emacs modes "knew" what was what based on that.
For example, all PCBs were in the pcb directory, with each design's four-letter-plus-revision name (like VCMD-A) as the root for the design. Library parts were in another directory, etc.
The syntax was not unlike an HDL. You instantiated parts from the library (using an Emacs command), and the instantiated parts each had ports (pins) with electrical types defined. Each port had an actual, just like an HDL. This meant that every signal in the design got a useful name.
The library system was very simple. Again, there was a library directory on the server, and each and every part had an entry. (So, yes, each and every resistor had a library part.) Part names followed a mandatory scheme, so it was all company part numbers. A part was a file with its pins all defined, for electrical type, loading, all of that. Each part also had a callout for a footprint, so when you instantiated the part in your design, it knew about the footprint. Creating a part was a simple as cloning something similar (which made the thousand-or-so resistors in the library tenable) and changing it to meet needs and giving it the correct part number.
It even had the concept of modules, so for instance you could create a module for a CPU, its cache memory, all of the decoupling caps, everything it needed, and then you simply instantiate the whole module in the board design. For a quad-CPU board, just instantiate four CPU modules. Everything for a VME or cPCI interface was a module. PMC slots were a module. So there was a lot of reuse. Modules could be hierarchical -- a module could include other submodules.
Since it was Unix, you could always tell who changed a file last, and it enforced a change log in the header of designs. That said, no version control system was used, mainly because it wasn't designed with that in mind, as everyone worked on the designs on the server. There was never more than one copy of a design.
The system had commands for rules checking, connectivity checking, BOM generation and of course PCB netlist generation. It even had a crude ASCII-schematic generator. It handled design variants without fuss, as we sometimes had a ridiculous number of configuration options. As parts got more complex, features were added. It exported PCB netlists in both Accel and Mentor formats (the big boards were done in Board Station, I think).
Once you got the hang of how it all worked, it was really quite slick and easy to understand, and you could zip through the design quickly.
All that said, it was a system built up over many years and maintained by one person. And it didn't have a lot of the features we take for granted in a graphical-schematic system, such as the linking between schematic and layout (click a part on schematic, it zooms to the part on the board) and the like.
Would I go back to it? Hmm... it is quite compelling. Back when I worked for that company, one of the other guys and I thought that a "better" system for the text-based design entry would be to use VHDL, as the language structure has everything you might need. All that is required is for someone to write a netlister that elaborated the design and generated a netlist in whichever PCB format you liked. Oh, and a BOM generator is needed, etc etc. But it's elegant.