Mixed signal copper pours

[andyturk]

I'm working on a 2-layer board with some simple analog circuitry, a microcontroller and an LCD display. The board is fully routed without using any ground pours and I'm wondering about the best way to do the pours.

One consideration is keeping the 40 MHz SPI signals from stomping on the ADC inputs. This was a big problem on the breadboard version and I had to alternate (in software) between acquiring data and updating the display. I can make things work that way, but it'd be a lot easier if data could be collected continuously. I'm curious to see how much of that noise was simply due to the breadboard construction.

Another part of the experiment is to have a separate 3.3V supplies for the digital side of the mcu and the analog portion to limit that SPI noise. The STM32 has distinct VDD and VSS pins for the ADCs (I think the chip's internal PLL is also powered from those pins). All the digital ground nets come together at a single point which is tied to the analog supply grounds (5V and 3.3V) through a ferrite bead.

The upper third of the layout is all analog. There are four pressure sensors, a 5V supply and some buffering circuitry. The middle third is basically empty because the LCD display is mounted there. The 3.3V analog supply is on the right. The bottom third is all digital. The blue stripe of vertical traces in the middle are the ADC signals coming from the analog side of the board.

What's the best way to add some copper to this layout?

[jahonen]

Generally, the most foolproof way to do that is to use a solid ground plane across the whole board, and place components and routing so that no digital currents will flow through your analog section. The trick is to notice that digital ground currents will follow the path of the signal itself. However, this might be difficult with just two layers.

I think that this issue has been discussed quite many times in this forum in the past, so you might find some discussions with search.

Regards,
Janne

[andyturk]

I've read a few threads here and some other material on the interwebs. Most of it seems to be concerned with designing ground *planes*, not merely copper pours. Maybe that means my expectations are too high for a 2-layer board.

Since I won't be able to have an uninterrupted ground plane, is it even worth pouring copper at all? I.e., the noisy portion of this board (SPI between mcu and display) well defined signal and return paths that are physically separate (as much as possible) from the analog side. Might adding copper pours cause the digital noise to couple more strongly to other parts of the board?

[free_electron]

running analog signals under the lcd ? that lcd is scanning .... lots a noise ...
slap a ground area there and connect ti on one point only to  a 'cold' ground. no current should cross this plate.

[andyturk]

running analog signals under the lcd ? that lcd is scanning .... lots a noise ...
slap a ground area there and connect ti on one point only to  a 'cold' ground. no current should cross this plate.

Ah. Good point. If I plaster the whole bottom of the LCD area with an analog ground pour, won't that couple some of the SPI noise (coming from the LCD connector) into the analog side? Maybe a second digital ground pour around the SPI lines?

[free_electron]

bingo! make the slit between analog and digiatl about 40 mils or 50 mils wide and you got a winner.
Now, you inkect the 'crap' picked up by that shield into the area aroudn those little resistors. i would not tie it there. go fromt he top right corner of the plane to the ground on the 3 pin terminal bloack ( the screw-connectors)

That way the crap does not flow through the ground bar of the analog inputs and can't make those 'bounce' around.
keep in mind that plane will shuffle electrons around in sync with the scanning of the lcd ( and the backlight of the lcd if it is a ccfl .... )

right now your layou channels those through a sliver of copper under your analog section where al the resistors are connected ... essentially injecting crap in there. you don't want those electrons flowing there. by tying the top right corner to the connector ground that is where they will go. current thrgouh a conductor causes a voltage difference... so you ont want to send it through that small trace on the bottom layer

[andyturk]

Crap is now aimed out the upper-right. And with the f_e seal of approval, I'm gonna ship this puppy off to the fab. Thanks for your help!

[andyturk]

An update with the live board actually running:



The LCD is showing a 10mV peak-to-peak square wave that's generated by a Rigol DG1022 function generator and fed through one of the input buffers. The plateaus on the waveform are a little crunchy, but that's basically what you get out of the DG1022 with such a tiny signal amplitude.

The spikes are what I was hoping to avoid. Sadly, a certain shit-for-brains got the pin numbering for the LCD connector backwards.      That meant I couldn't mount the LCD on the board as originally intended. In order to see the display in operation, I hooked it up to a breakout board and then run a bunch of wires from the breakout connector back to the LCD pad on the board. It wasn't a complete wasted effort, but I'm sure those bodge wires are blasting 40MHz SPI noise all over the place.

Even so, the spikes in the photo above are roughly equivalent in amplitude to the signal itself (which is fairly small)--about 10mV. When I had the same circuit on a breadboard, the spikes were several hundred mV. Interestingly, the amplitude of the spikes seems to be dependent on the offset of the input signal.

The input side of the board buffers 5V analog sensors and produces a low impedance 3.3V output for the ADCs. For testing purposes, I've left out two of the sensors and attached the function generator to one of the empty output pads. In the photo above, the 10mV square wave is centered around 0.5V. When I crank up the offset on the input signal to 4.5V while keeping the amplitude the same, the spikes get noticeably deeper:



What would the amplitude of the input signal have to do with inductively coupled noise spikes coming from SPI? Or am I misunderstanding what's going on here?

[UPI]

Have you posted a schematic for this board?

What type of device is U201?

[andyturk]

Have you posted a schematic for this board?

Well, I suppose that would make analysis easier...

What type of device is U201?

It's a MCP6004 quad op amp.

DipTrace doesn't seem to export .pdfs, so these unfortunately are just images.

The "main" mcu page with connections to the outside world, the clock, decoupling caps and a reset switch:


The "I/O" page with buttons, LEDs (gotta have blinkenlights on a prototype board), and the LCD:


The "analog" page with MPXV6115V vacuum sensors, and signal conditioning stuff:


The "power" page with a collection of LDOs (LDS3985s) which will eventually be replaced by a couple of DC-DC boost converters:

[UPI]

If you pull R202, 207, 215 and 217, do you still see the noise on the ADC inputs during SPI traffic?

I am wondering if the noise is coming from the input stage or being couple somewhere else down the line.

[JuKu]

Or am I misunderstanding what's going on here?

Maybe. To me, those look more like AD conversion errors than coupled noise. Have you looked with a good scope the signal at the AD pins? Have you forced a signal at J201 to a constant value with sufficient capacitance (to provide a true constant, relatively noise-free voltage to AD?

I'd put ferrite beads on the major section power feeds. (Main power line - ferrite - local capacitance - a circuit section)

the critical path here is U201 power supply - U201 output current - returns. What are the values of R202 and R204 and what is the AD input impedance?

the culprit could also be the display. If you do a re-spin of he board, give it a regulator of its own, behind a ferrite, and put a grounded copper foil between it and the rest of the circuitry. I'm paranoid with displays and AD's, and there are reasons for that.

[jahonen]

You could also temporarily wire SPI signals you suspect through bunch of RG174 (or similar thin one) coaxes, to see if it has an effect on the noise you see. Just remember to connect both ends of the shields to ground.

Regards,
Janne

[lgbeno]

Wrt to the PDFs, you could print to PDF with something like primo PDF.

About the routing, you've managed to route a pretty complex circuit on just two layers which is awesome but I think the sacrifice is a proper ground plane.  The core concept is that, all analog (and digital) signals are a measurement of voltage with respect to ground.  Now if there are currents flowing on the ground trace and its impedance is not very close to 0 ohms, there will be some drop which will cause error.  High speed digital circuits are particularly troublesome because it doesn't require much capacitance for them to couple to other traces and also if there isn't a low INDUCTANCE gnd return, there will be a high impedance return path and hence a lot of drop inducing error.  Inductance is really synonymous with loop area (and a lot of other things but area is a good simplification).  So if you we're to trace the path of where the return currents were flowing for say u201 and the LCD, in the first rev of your board, they go along the same path so that is big trouble.  The loop area of the path is also very large so the impact is even worse.

Unfortunately I think that the best solution is to start routing from scratch, take all of the parts in you schematic and classify them as either analog or digital.  Of course your uc is mixed signal so it is in both domains.  I would then use the top of the board for all analog components, place the uc in the middle of the board then the LCD at the bottom as far away as possible from the analog.  Your power supplies are in a good place already.  Then try to route ALL signals on the top layer.  If that isn't possible, use very short links on the bottom layer to cross over the top traces.  Then when everything is routed pour the bottom with as much ground as you can.  This will perform much much better.  Since you don't have a power supply plane, it is also very important to decouple VCC pins very well so that the traces source dc current only and high freq current is sourced from the cap.  If possible, one cap per pin but that isn't always reasonable so try your best.  Also when place visa on these caps, you should do it in a low inductance manor, just google it and you'll get a ton of hits.  Use of ferries is a good supplement too but it isn't as important as the other stuff.

Always, the best layout starts with smart design partitioning, logical placement of components, optimize for low inductance routing and maintain as continuous of a ground plane as possible.  Caps are cheap too.  I always think it is better to solve EMI with low gnd impedance paths.  One other supplement would be some series resistors on your dpi bus especially the clk.

Good luck!

[lgbeno]

Sorry about all of the autocorrect errors, I guess my iPad doesn't speak engineer very well dpi=spi, visa=vias, there is probably more too.

[andyturk]

@lgbeno:

After some screwing around this weekend, the noise situation doesn't look that bad. The main thing I have to correct for the next spin of the board is to get the LCD connector pin numbering correct so I don't have to hack the LCD on with 2" lengths of 28awg wire.

My goal is to eventually get this gizmo into a small handheld enclosure and power it from 2 AA cells:


The cases aren't very big and because of where they've located the supports and standoffs internally, I have to put the LCD in the middle. The four pressure sensors and the analog stuff will go at the "top". The mcu and buttons (won't need 4 in the final version) will be below the LCD.

I also have to stick two DC-DC converters down there too (3.3V and 5V). These can be fairly small in terms of board area, but I have yet to see if they can co-exist peacefully with the ADCs.