Paste Mask and Mask Shrink

[Falcon69]

I'm using DipTrace.

WHat is standard practice nowadays with these two options?

I have Solder Mask Swell at 0.05mm and Paste Mask Shrink at 0.05mm.  Is that an okay setting?

What's everyone else use for their boards?

[T3sl4co1l]

0.1mm mask expansion, 0 paste expansion.  Very typical of most any PCB manufacturer, though paste expansion you'd have to talk to the assembler.

Although I've also heard 0.05mm or less mask expansion (and 0.05mm minimum mask sliver) is acceptable, at least on the better quality processes.

Tim

[Falcon69]

Okay, at 0 paste expansion, you don't think there would be too much solder paste applied?  The stencils are stainless steel. I am not sure if they are punched or laser cut.  I think laser cut.

[T3sl4co1l]

Idunno... they don't complain about paste.  Are yours too thick then or something?

[Falcon69]

nope.  I just remember reading somewhere that the stencil cutout (mask Shrink) you want just abit less then your pad. So that there's no chance of having too much solder paste.

[T3sl4co1l]

Hmm, I'd say ask your assembler... likely they'll play with the mask to suit their process anyway, but you can always see what's typical.

I don't think it matters very much; most devices are designed for that sort of thing, for full pad coverage that is.  I think the most sensitive would be a full pad under a QFN, which could float up, whereas the leads usually have some toe fillet*, meaning they'll want to sit lower rather than riding up on a blob.  (BGAs of course don't matter much because they have a huge ball, you mainly just use the paste to be sure it touches the pads.)  And as for placement, it's not a big deal because the paste flows pretty well on heating and melting.

*Found a doozy recently.  FT232RQ does NOT have traditional QFN construction.  It's built slightly more like an LGA (no toe).  Also, their drawings of the part stink!

I know there are differences between types of masks (material, thickness, cutting method, taper, surface finish) and geometries (paste tends to be retained in sharp corners, versus releasing better from round corners), but as for what works best... there's probably a broad range of "good to great" ways of doing it, so that asking for one best way is kind of pointless.

But yeah, I just draw the things, I don't manufacture them.  If there's an assembler around, maybe we can get some more specific answers?...

Tim

[IconicPCB]

stencil shrink is related to stencil thickness and to the paste being used.

Typically I make own stencils from 0.2mm thick FR4 laminate. I find 70% openings are working out ok for me.

[Falcon69]

okay, sounds like there are variables there, that depend on the thickness.  I guess at this point, it is best to ask the manufacturer and let them decide.   Thanks Guys.  I will design the boards for 0.5mm Paste and 0mm Mask Shrink and let the Manufacturer know that they need to decide the mask shrink based on thickness of the stencil they are using.

[ShaunAndFRED]

*Found a doozy recently.  FT232RQ does NOT have traditional QFN construction.  It's built slightly more like an LGA (no toe).  Also, their drawings of the part stink!

I just got burned by the FT232RQ too! What is that part?! Followed all the datasheet recommendations and still about half the boards failed. I replaced it with the FT232RL on the board rev bump. Twice the size but 100% less BS.

[Quark-elec]

0.1-0.15mm mask expansion, 0 paste expansion or maybe 10% reduce of the pads could be ok.