Do you have any plans for how you plan to encode requirements for nets? For example, different families of logic have different high low voltages, can I encode that this chip emits at least 4.5v for high voltage, whilst this one can't handle more than 3.3v on its input. These requirements are often dependent, for example, must not be higher than Vcc (where a chip may have multiple Vcc rails).
Also, what about parameterized modules based on use? For example, I would love to be able to just declare a Sallen–Key filter, based on f0 and Q, and a) have the module work out the values for me, and b) have some validation that the resistor and capacitor values are appropriate.