Weird. Different packages have different worldviews on connectivity and stuff...
Altium autogenerates names on compilation (not live), which is a "bring it all together" step on the schematic. With that done, you can probe a wire to see what net it thinks it belongs to. Net names normally come from a pin on some component (I assume the first pin it finds attached), or if used, an off-sheet connector or port (also depending on project settings). Altium will remind you if things are funny (multiple possible net names warning), but doesn't ever really screw things up. The worst that can happen is, you've referenced an auto-named net, by name, and the name changes. Which I think only happens in simulation postprocessing (since SPICE nets are named by the netlist, of course). And that's basically your fault for not using an explicitly named net; if you want it named, name it.
Altium also uses nets as a property of each physical object on the board: pads, traces, polys, anything. Suppose you have a bus (a set of related traces, running in parallel), and need to swap some around (maybe you can save a via or two with a pin swap at one end or the other, a typical example). You can't just delete the bits touching the pads, draw new copper and have it work; no, you've shorted between nets, because the copper doesn't auto update. You have to do a "connectivity by physical connection" or whatever, or change the nets manually. So, they treat every little line segment as a fully privileged, first class object with net name and layer and position and all these attributes. (Which, since everything is an object, isn't too bad, it's logical and consistent from the computational direction at least; but it may not be the most convenient.)
The other package I've used a lot is Multisim/Ultiboard. This is much more special-case programmed, so you only get so-and-so fields on components, net names are autogenerated on drawing (not regenerated on every 'compile' procedure), names are usually persistent once placed or specified, and connections can be made globally in any number of ways (on/off sheet connectors, global supply symbols, manually specified net names, buses..). One thing that pisses me off: it seems to handle net names better than component names. I can specify that a circuit should be IC4B exactly, or a hierarchical sheet be "DQ1" or something. But then it'll go and rename it to U12A when I place a new component! It seems like, when it searches for a next-available-index to name the new component, that causes a "recompile" sort of event. Despite not having one accessible in the menus. So, labels, user fields, but not usually net names, are sometimes fragile and weird.
As for Ultiboard, forward/backward annotation is done through a file, and seems well behaved (random renamings notwithstanding). It's no worse than Altium, which does it through ECOs (which generate a file, but the process is done all within Altium, not between two programs; whether it actually parses the ECO, or transfers the changes internally, I have no idea, but it's just a couple of clicks in both cases). In Ultiboard, traces are second class objects, they don't really have attributes (there's something of an object system too, but not nearly as accessible or as fixed as, like, being able to use Altium's Inspector box on literally everything). As such, you can delete connecting segments, and floating copper defaults to 'no net'. You can short a new net onto said copper, and accomplish that bus trace swap I talked about earlier. Though cleanup is worse, because it doesn't really give you object snap or anything. Manipulating things is very manual, heavily mouse driven, one object at a time, diving into dialogs and such (for both Ultiboard and Multisim). Absolutely no design rule engine, only the most basic trace/pad clearance sorts of things can be set.
As for heritage, I guess Altium is kind of unique; it comes from Protel and whatever, which has always been its thing, so it operates in its own way. Like AutoCAD works in its own way, and SolidWorks, and so on. Multisim/Ultiboard are again different, probably with more influence from the Mentor Graphics side of things (I notice some similarities with PADS, but, I haven't used the latter enough to really comment on it... except to say there's no way it's worth its price).
S'pose I should try Eagle some time, just to see how truely awful it actually is, and if it's possible to do real work in it at all (I guess it is, people are making boards... but..??). I've also got gEDA, but only ever opened it, just to see nothing of interest or value; looks like a righteous pain to get anything done in it, let alone the work flow between umpteen different, fully independent applications. But I didn't pay anything for it, so that's just the way of FOSS; it's written by programmers, for programmers. Probably great on data structures, crap on CAD, that kind of thing, what do you expect.
Tim
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