Simple Latch Circuit - Is my brain working tonight?!

[David]

Hi all,

It's been a long day and I have been thinking about a simple circuit I require. Please could someone confirm I am thinking correctly or humour me if not!? 

If the micro in the circuit shown below outputs high then the circuit will latch and the load will remain powered by 3V_Rail_B. Let's say the micro is reset and during reset the I/O pin is in a high impedance state. The circuit should remain latched? Now if the I/O pin is pulled low then the circuit will no longer be latched?

[vlf3]

Assuming your 3V rail is + positive, with respect to ground negative, I would say yes; it should behave as you state ? although a small cap value on the NPN base to ground, or better still base to collector, forming a sample & hold might help to stabilise, when micro goes low.

Rethinking on this; there might be an issue if 3V rail A is below 3V rail B !! but having a common ground... otherwise if the 3V rails are independant of each other as two supplies, then the design should function.

[TerraHertz]

Yes, it will latch. But it may also turn on by itself, since you forgot a base to emitter resistor on Q2 to make sure it stays off when it's supposed too.
Also, on power-up, what ensures the circuit doesn't latch due to momentary H output from the micro? There's no provision for a state initialization by RESET.

[amspire]

Now if the I/O pin is pulled low then the circuit will no longer be latched?

As long as R2/R1 is greater then about 6 or greater. The exact ratio you need can be reduced with the base emitter resistor mentioned - a good idea - and it does  depend on the maximum battery voltage.

A ratio of 10 would be an extremely safe choice - say R1 = 100K, R2 = 10k