Yep. With few exceptions (check the datasheet), the /CS pin defines the state of the MISO pin. So connecting all MISO pins together and activating all /CS pins will not be all that great.
There are exceptions - some, few chips may enable the MISO buffer only after receiving a specific 'read' command - but that's relatively rare. So you'd need external circuitry to handle this. Unless you can guarantee that the state of the MISO line upon the falling edge of /CS, on this particular chip, is always going to be the same state (0 or 1, preferably 0) in all conditions, so that tying them together and enabling all chips, if you know for sure the MISO pins are not going to change state during the whole transaction, would not be a problem. I wouldn't feel really comfortable doing that myself.