In the case of the Hantek, this was most likely due to imperfectly spaced sampling due to difficulty timing 5 DACs rather than 4 on the atten.
actually it is vice versa - Hantek does use 4 or 8 ADCs and ATTEN/Rigol/Siglent 5 or 10, but the problem is everywhere the same:
- ADCs clocked from FPGA (jitter)
- FPGA not using dedicated clock outputs (jitter)
- all VREF (ADCs) connected together and to internal VREF instead of external and stable VREF
- bad PSUs/signal path supply filtering
All these factors above have big influence, most of them (PSU and VREF can be changed, clock change need drastical redesign - cost factor!!!) can not be fixed or only when you spend a lot of $$$ (which didn't make sense because then you can buy
better scope and hope the manufacturer did good job .. which is unfortunately not always the case, you can buy 20k $ scope
and will still see distortion created by not properly aligned interlevaed ADCs).
Additionaly by design all these low budget DSOs does not have clocks aligned properly in phase - why ? well
because they can't, the FPGA i/o jitter is already that high that you can't align them. All these DSOs are using
simple trick - sample every ADC sperate -> calculate cross zero timepoint -> align the sampled data.
This works of course good on paper - but in real world already a small jitter in test signal during factory calibration
is creating distortion in the table (and again, look the factors above, they have later still influence),
sometimes (when you have good FG) you can recalibrate DSO to work a better as with original factory calibration,
the cross zero calculation is very depandant on jitter, edge rise time and timebase settigns during calibration.
I was for example to calibrate my DSO light years better than Hantek did it originaly - a extrem low jitter FG very fast rise time,
patched firmware (to run calibration in 1ns/div - yes ONE).
The best case scenario is with non-interleaved ADCs, however it costs money - actually only Rigol CA/ATTEN CAL is
using ONE dual-channel ADC (which of course is still in interleave mode when only one channel enabled, but the distortion
is a bit better because the ADC is taking care of clock phase and not FPGA) - but they have only small sample memory.
Another option is Owon SDS - same as Rigol CA/ATTEN CAL but it does have 10Mpoint memory - unfortunatley waveform update
rate is slow as hell. The next possible DSO is then already Agilent DSOX, Instek DSO3000 and so on.
Now back to low range DSOs - depends on firmware you might get fooled, a non "wobbling" waveform on screen didn't means
that the DSO is really properly working (ADCs phase aligned) - when you switch Hantek to slower screen update you
will get waveform exact such stable as on Rigol - on Rigol you can't just switch to faster update to see all these distortions
created by jitter and aliasing. So what is better ? Non of them, one setup is lying by doing avg, another is wobbling around
due all these factor above
And finally QC - when you have no luck you bought "broken" scope, maybe not 100% broken but probably some
components issue (drift, cold solder, transport issues) or lazy ppl at manufacturer side (moved cable during calibration, whatever).
All you can do is to compare with EXACT same model and EXACT the same test setup, just a quartz oscillator and piece of unknown
cable/terminator is not enough.