I like that idea, but I have no idea how to realize that with just a spare comparator (if it is spare, see below). I would need a VCO, that comparator to digitize the LC tank phase, an XOR gate, and some passives to realize that. That would add a lot complexity/cost. Currently the [almost] solution is ~ 10x10mm without coil, and <3Euros.
Well, 4046s are at least a third of the footprint, and a tenth of the cost...
When thinking of an uncontrolled free-running RC oscillator, that will not work. Q is 80 in the circuit, so bandwidth is only 2kHz or 1.2%. Plus, the available change in amplitude from detecting metal is only ~ 10%, so I cannot allow for much detuning. I only observed marginal detuning effect at the chosen operating frequency, it is optimized for best eddy current sensitivity.
So you're saying it's too sensitive? Put more resistance on it!
It was not there in the first design, but I experienced that I could not allow for the temperature dependency of a real diode.
Ahh. Well, with a Q over 10, you can get plenty of voltage on the node (>50V!). If you use a 74HC4046, the logic pin output resistance is around 50 ohms. For L and C in series, 10mH and 100pF gives Fo = 159kHz and Zo = 10kohms. With an ESR of 50 ohms, Q max is 200, not bad at all! (If you measured Q = 80, then I'm guessing the inductor has 125 ohms ESR. Unclear if that was including the comparator and sense resistor.)
With a PLL tracking resonance, you'll have all the signal in the world (up to 250V, apparently!), no worries on diode offsets.
The diodes are actually a rather difficult part, because to retain the same Q factor, the load needs to be over 1Mohm. That's pretty high for a diode; and, needless to say, you can't use anything near that (i.e., at least 4Meg) for the voltage sense divider.
But also with so much signal, I doubt a PLL is really necessary. It should be no trouble getting that to start, with any kind of oscillator design. Going back to your original circuit: make sure it is astable, not bistable. Change the negative feedback divider so it hunts around Vdd/2, and, maybe cap-couple (with just a few pF) the high voltage signal to the +in?
Tim