Like using C++ to write software instead of using assembly isn't programming? Even when putting a chip together from existing blocks you'll need to take thermal behaviour and power distribution into account.
Bad analogy.
A correct analogy would be : i write code , i design instruction sets.
Or : i write code in c, i make c compilers...
Designing an efficient instruction set is an art in itself.
We postprocess many ASIC designs. In chip design there are four big areas (apart from the actual fab)
Process technology : the chemistry and physics of ic design. What chemicals do we need in what quantity and how big of an area do we need to create or how thick must the layer be to make a transistor that can do do 1ghz at 20 volt breakdown and 100mA current with a beta of 100. Given the doping dosage for the wafer figure it all out and come up with the optimum structure shape. Test it using waterfall , characterise the snot out of it , build the accurate spice model and stick it in the library as base element.
Library: manage the base elements and create base blocks with them. Things like logic gates , io structures , bandgaps and other references, base amplifier structures etc ...
Front-end : schematics , verilog, vhdl. Use blocks , make blocks using base elements from the library (base elements being transistors, blocks being gates or analog function blocks)
Back-end : place and route , timing closure , parasitic extraction, net drive strength analysis etc.
There is continuous interplay between these. A front end designer makes a counter in verilog , produces a netlist, simulates it using the models.. And produce the accurate model (timing) Handoff to backend.
The backend guys plonk the gates on the wafer, interconnect it and then extract parasitics and loading. They verify the actual placed system against the model delivered by the designer. If it turns out a net needs more drive strength they inject or scale buffers accordingly. If timing closure cannot be done because of something like a 5 input and not exisiting and has to be made by cascading 3 input ands they go to library and request a 5 input gate. Backend guys spit out the actual layout of the entire system , extract all parasitics and run the simulation against the model from frontend.
Front end back end interplay is very similar to designing boards using components. You design your circuit , do the placement and routing and check for emc esd and other things to create a working system. Your library group is the website of digikey or mouser. With difference that, if nobody makes a 5 input and-gate you are screwed. You'll have to have it custom built as an ASIC by a chip maker. Of course in siliconland there are much more things to account for than in pcb land. But it is similar. You are using components, you are not making components.
The real hard design work is done by the process guys. Those are the guys that come up with new technologies like finfets, 22nm, 18nm, SOI , and all that is required to actually make the chip. That is the real design work.
I have done front end , back end and library. Does that make me a chip designer .. Not really. Because i couldn't design a transistor if my life depended on it. I can layout one if you tell me how long and wide you want the gate to be ... But i dont know , for a given chemistry , to figure out how long and wide it needs to be.... That is the designers work.
I have made libraries with logic gates in 1994 for 0.5micron. They gave me the gate dimension for internal transistors and for the output stage transistors. The goal was then to make blocks that fitted on a grid (input output lie on a grid so the placer can route them) being as small as possible. Height of a block was fixed, length defined by the number of i/o needed. You also needed to provide cross channels. I created the schematics , did the layout and created the library. These were then fabbed, tested for speed and drive strength and signed off. Many a chip has been built using that library.
We had a tool called a p-cell generator. You plonk in what current and voltage you want and presto : here is your transistor. The equations behind them are specific to the chemistry , lithography , doping used for that process. These equations come from the real silicon designers.
But i still don't consider myself as silicon designer as i can't design something simple as a digital transistor (nor do i have an interest in that)
Maybe that is the destinction that can be made.
A ic designer does frontend backend and library but only a true silicon designer makes the transistors and defines the process technology.
Ic designer is within reach of everyone given strong motivation and a bit of luck.
Silicon designer .. You'll have to be ic designer first, work for a semiconductor maker for a while and learn the ropes from a bunch of greybeards there... And youll have to get their blessing before you get to spend oodles of money on machinery and consumables testing your 'process'
Very few ic makers actually design their own processes. They buy them or license them from others. It is simply too expensive to design. Companies like maxim dont have process technologies. They license them or use someones fab that can run it. Not all fabs can run all processes.
Remember when the max038 went obsolete (together with a bunch of other maxim chips) ? That was because their foundry retired the process used for those chips. Nobody in the world runs that process anymore. So game over for those.
If a device is a high flyer they will redesign for a different process. (This is called a shrink, if geometries become smaller). If it is not , they pull the plug. Unless the part is used by military or some other whackjob with lots of money then the masks, gds tape to make the mask and the process are transferred to companies like Rochester electronics.
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