Two of the worst I've seen:
One was a QFN that's actually an LGA. In a QFN, the leads come out to the full corner, so a toe fillet forms. In this one, the plastic wraps around the corner, so although there is some exposed metal that could be soldered on the side face, that's not going to happen, and it's actually an LGA (pads on bottom surface only). The drawing looked like a sixth grader made it, though it probably didn't help that I saw "QFN" plastered everywhere, and was expecting measurements for a QFN, when it turns out it was actually an LGA, and if I had read it for what it actually was, it would've made more sense.
Oh, so add that to the fire, manufacturers using their own mickey-mouse, proprietary (and often obscure) names for utterly common packages. (It's not "TO-220AB", to On Semi, it's "Case 221A".) And poorly documented variants of common ones.
Another was a coin cell holder, with no tolerances specified anywhere, only the default in the title block. A +/- 0.25mm tolerance on
everything means that:
1. to guarantee fit of the 0.8 and 1.0mm alignment pegs in the PCB, I have to use 1.05 and 1.25mm holes; except,
2. it's worse than that, because the position and separation distance tolerance are the same 0.25mm again, needing 1.55 and 1.75mm holes, strictly speaking.
So, the part can fit either direction on the board, with tons of slop to spare, if you follow the drawing exactly.
Turns out the real parts are well within 0.05mm of the drawing nominal values. So I made the right choice, making the footprint according to realistic tolerances. Risky though.
I have a pet hate on for connector datasheets, the footprint drawings are clearly done my the mechanical guys and basically never quite tell me what I want to know without reaching for a calculator.
It's not always the manufacturers. I took a look at SFP connectors and modules. The SFP consortium sets dimensions and tolerances for all compatible hardware. They
don't give dimensions for the connector pins. They do give a recommended footprint(!!). Manufacturers merely copy the same drawing; after all, one familiar with the SFP standards might wonder, why did they add any tolerances, are they not compliant? Or probably even lazier than that, just going with a standard and not giving a second thought at all.
Jellybean transistors have the same problem, where JEDEC registered parts (2Nxxxx series, for example) are registered only on those scant data and nothing else. At least a few manufacturers do go out of their way to be informative, e.g. On Semi datasheets are often flush with data and graphs well beyond what the spec sets.
Speaking of standards, some packaging standards are awful. Did you know TO-220 supports round leads, a tab as thin as the leads (usually only seen on 78xx regs), and tolerances wide enough that the proportions look wrong? What you usually see -- what you usually think of -- is actually TO-220AB. It makes a difference!
The DO-214 series is similarly messy -- the tolerances are massive, to the point where several manufacturers suggest footprints that have
negative toe fillet (a big no-no) if you believe the MMC condition in their spec -- which isn't their spec at all, but a JEDEC (or one of those bodies) registered one. I've seen a few that actually give their internal package dimensions in addition to the standard, showing compliance with the standard and also a much more representative size to design from.
Seriously, over dimensioning the things really would not hurt if it saves the "Twice A - (B+F)/2 + D - E" shuffle.
Oh and FFS pick ONE datum, not three with hairy maths to map between them, also LABEL the "bottom view" (In BOLD RED TEXT), been burned by that one.
Tim
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