Well, the most damning evidence I found so far is the product's own web page.
architecture: CMOS
Suspect the Vos vs. Vcm is an artifact of the measurement. Wouldn't make any sense for that to happen if it's an RRI structure, how would it know what GND is? It's certainly NOT an RRI type, as it doesn't include GND, but does include VCC as any other classic JFET input stage.
I agree it makes no sense, although it could know mid-supply if it wanted to (not ground) by a resistive divider. But it's inconceivable what technical or even marketing reasons could motivate that.
There is no such artifact in datasheets of similar chips listed by Kleinstein, that's the strangest thing
![Confused :-//](https://www.eevblog.com/forum/Smileys/default/confused0024.gif)
I am not sure why I should disbelieve the manufacturer if it's them telling me that their product sucks.