Andrew S. Tanenbaum must have gone crazy, or something

[DiTBho]

ok, from v1 to v3, Minix has always had support for x86, and this has a whole set of reasons, but in his last 2020th Structured Computer Organization university course, Andrew S. Tanenbaum put IJVM on the same level as 8088, which is pure blasphemy even considering what he wrote in 2004 books, where IJVM was created precisetly to avoid working on architectures like x86 during laboratories and examination, because x86 had been deemed inadequate for any teaching and laboratory activity that was not at an advanced level or PhD level.

So, I'm quite horrified and shocked to see the same examples once written only for IJVM, now repurposed for 8088!!!
What is the problem? maybe the lack of an emulator?

In the early 2000s, Java v1 was in the air as a "revolution" and IJVM (Integer (simplified) Java Virtual Machine) shone in its own way with that hype... today... it's a cold "meh" ..."

But this news is really shocking! I feel, something has changed ...   

[Nominal Animal]

What is the problem? maybe the lack of an emulator?

Perhaps the problem is the behaviour of a six-letter word that starts with an 'Or' and ends with 'le', related to a business entity now owning the Java 'Intellectual Property'?

Or perhaps the IJVM is no longer comparable to other extant bytecode environments.  Does the course mention LLVM Intermediate representation or MLIR?  Or WebAssembly?   LLVM IR is special in that it can be represented as text, an in-memory format, or a bytecode format.  WebAssembly has several implementations (all major browsers) for basically all architectures, and they're pretty efficient.

I think replacing IJVM with WebAssembly would make most sense.

Then again, I know absolutely nothing, because I haven't even read the 2020 version of the book/course.
What has replaced IJVM in chapter 4, exactly?

[brucehoult]

Or perhaps the IJVM is no longer comparable to other extant bytecode environments.  Does the course mention LLVM Intermediate representation or MLIR?  Or WebAssembly?

Or MS CIL. https://en.wikipedia.org/wiki/Common_Intermediate_Language

LLVM IR is special in that it can be represented as text, an in-memory format, or a bytecode format.

Ditto CIL.

Code: [Select]

.class public Foo {
    .method public static int32 Add(int32, int32) cil managed {
        .maxstack 2
        ldarg.0
        ldarg.1
        add
        ret
    }
}


WebAssembly has several implementations (all major browsers) for basically all architectures, and they're pretty efficient.

CIL is of course native to x86. But when MS open-sourced CoreCLR in early 2016 Samsung immediately ported it (in cooperation with MS) to Arm, for use as the standard app programming language for Tizen 4 (replacing native C++) in their TVs and other products (mobile phones in some markets). I was on that team for a while, before being pulled into a different project (Samsung GPU).

Later Samsung ported CoreCLR to arm64. That has just recently reached the market in products.

Currently Samsung is porting CoreCLR to RISC-V, and a Chinese port to Loongarch is in essentially the same stage too -- we often find x86/Arm assumptions that cause bugs (with the same fix) for both of us. They basically pass all tests, but code gen is not yet optimised.

So: ia32, amd64, arm32, arm64, riscv64, and loongarch.  Pretty good ISA coverage.

I think replacing IJVM with WebAssembly would make most sense.

I don't have any version of the book so don't know the exact aims of uses or needs, but if 8086 is/was an option then you just know I'm going to suggest RISC-V, right?

If you're writing a student OS then RISC-V has I think the simplest and cleanest definition of privilege levels, moving beteween them, traps and exceptions, protection, page tables.

And of course xv6 (AT&T Unix R6 translated from PDP-11, created/used at MIT) moved from x86 to RISC-V about five years ago (EOLing the x86 development).

[SiliconWizard]

Agreed, RISC-V would be a reasonable target for this, and it's also very easy to emulate if one wants a pure software emulation. I wouldn't touch anything Java with a stick.
Not sure I'd see the point of using an IR such as LLVM IR, which, btw, I don't find particularly good.

[DiTBho]

IJVM was not byte-code compatible with JVM, it simply took some concepts from PicoJava, itself a simplified version of the Java virtual machine v1, and used them to create the ideal teaching platform precisely for courses where it makes sense to show how the CPU works.

Even microcoded!

IJVM has several implementations, the first version we came across in 2000s laboratories was taken from the book and was called "MIC1", where "MIC" means "microcoded", first version.

IJVM is a machine that emphasizes "clean" separation of code space from data space, which is further separated into constant (i.e. read-only) space, temporary working space (RW, only in advanced MIC versions), and stack space, which is the primary working space.

The 2000s implementations from MIC1 to MIC4 are all strongly and rigorously "strickly stack-based", which is described at multiple levels, starting from the hardware level, on which the laboratory activities involve the study and writing of "micro - code" first, and then macrocode.

I remember there were to tools for that, a micro-assembler, and a macro-assembler, both written in Java-v1, and provided as .jar in both CLI and GUI version.
Both provided with the Tanenbaum's book.

All ISA level instructions are implemented this way, with all the necessary details and examples.

So you can see what's behind an "iadd" (integer add) doing
- stack_push (A)
- stack_push (B)
- stack_pop (A+B)

iadd does all these steps one-shot. You have to describe these steps in details in macro-assembly.

And in particular the stack approach is highlighted, the Reverse Polish Notation is introduced, as an alternative to the "recursive descend parser" (used in general purpose CPUs, not strictly stack-based), for the unraveling of simple mathematical expressions.

Today... much less importance is given, and instead of the micro and macro levels, the Intel 8088 ISA is directly introduced, saying "intel has implemented these instructions, which do this, and that, see the Intel manual for reference, it it doesn't matter how they were implemented"

It will no longer be necessary to work on micro and macro assemblers!
No more examples of microcoded implementations described in detail!

There are still some in the book, and the suggested approach is for a few superficial quotes, exhausted in less than 4 hours of the course! Against two months of laboratory activities that were held in 2000!

You understand that if the level is this, it almost makes no sense to make any distinction below the ISA.

And, worse, the clear separation between the "constant-pool" and workspace is no longer emphasized.
And since 8088 is not even a strictly stack-based architecture(1), I leave you to imagine how much emphasis is lost even on the reverse Polish notation approach.



(1) to be able to use memory in a linear way, you need to evolve MIC1 to level 5, MIC5. It was done in the advanced laboratories, and you spit blood to get there, and you could ONLY do it after having understood and overcome the previous laboratories.

[Nominal Animal]

Pearson has a table of contents of the 6th edition (2013) version here.  Chapter 2 outlines computer systems (memory, storage I/O); chapter 3 outlines basics of digital logic, with Intel Core i7, TI OMAP4430 SoC, and ATmega168 described as examples; chapter 4 is about microarchitectures at compares the aforementioned three; chapter 5 is about instruction set architectures and uses Intel Itanium 2 as an example; chapter 6 is about the operating system and uses Unix and Windows as examples; chapter 7 is about assembly language and linking and loading; and chapter 8 is about parallel and distributed computing.

If you're writing a student OS then RISC-V has I think the simplest and cleanest definition of privilege levels, moving beteween them, traps and exceptions, protection, page tables.

Good point.

Looking at the book/course (table of) contents and the intent, I think RISC-V would indeed be a much better example to include.

Not sure I'd see the point of using an IR such as LLVM IR, which, btw, I don't find particularly good.

Now that I have seen the contents, I agree.

I made my suggestion of WebAssembly without even seeing the book/course at all, because it (especially using emscriptem) would be the easiest/cheapest/most practical to experiment on, if a simulator or some such environment is needed.

Today... much less importance is given, and instead of the micro and macro levels, the Intel 8088 ISA is directly introduced, saying "intel has implemented these instructions, which do this, and that, see the Intel manual for reference, it it doesn't matter how they were implemented"

It will no longer be necessary to work on micro and macro assemblers!
No more examples of microcoded implementations described in detail!

There are still some in the book, and the suggested approach is for a few superficial quotes, exhausted in less than 4 hours of the course! Against two months of laboratory activities that were held in 2000!

Ah, now I understand.  Eww.  8086/8088 instruction set architecture is NOT a good example!  The low number of registers (AX, BX, CX, DX, SI, DI, BP, SP, status, and segment registers DS, ES that act like an offset to the entire 1Mbyte address space at 16 byte granularity), and the quirks of the registers (like DX:AX pair used in 32-bit multiplication results, CX used for loop/repeat instructions, BX for additional addressing modes, I/O ports only accessible via AX/AL), makes it a pretty difficult/complex architecture.  The compilers at that time didn't even try to apply optimizations to the code they generated for 8086/8088; it sufficed the code just worked!

Just because 8086/8088 became popular, it is rarely used anymore (the 32-bit x86 and 64-bit x86-64/AMD64 are), and its past popularity was not due to its design!  Yes, the change seems definitely odd.

Then again, this seems to be very much in line with current academia: appearances and popularity matters, not actual understanding and being able to apply this knowledge to solve problems.  Those are irrelevant details left as an optional exercise for the student.  Blergh. 🤮

[SiliconWizard]

Yeah, still, I would wait until I get an explanation from Andrew before making a judgment.

Also, while his work has been seminal, Minix is not the be-all and end-all. It still has definite educational value, whatever the targeted CPUs are. For a more modern and more "usable" microkernel, I would rather look at seL4 these days.

[DiTBho]

For a more modern and more "usable" microkernel, I would rather look at seL4 these days.

Yup.
Xinu is quite old.
Yet another educational toy.

[DiTBho]

Yeah, still, I would wait until I get an explanation from Andrew before making a judgment.

The whole discussion started when Ania showed me in detail her course on operating system architecture and the related labs.
Never sell your old university books hoping they have improved in the last 10-20 years.