If you manage to find anything I would be interested.
Sure
I am also thinking about reverse engineering the main board, I am curious about its inner working scheme.
Yes, it would be quite interesting to reverse engineer but I think this could be very difficult. The main issue is that there is quite a large CPLD (MACH120-20) on the board and until you can reverse engineer the internal logic in that CPLD it would be difficult to work out the total function of the circuit. There is also another small PAL chip on the emulator head but its logic function should be much easier to decipher than the large CPLD.
I am not sure if you can read back the internal fuse map of the large CPLD and possibly use that to determine the internal design. It is not clear from the chip documentation whether the MACH120 CPLD has internal anti-piracy measures to prevent fuse map read-back. Someday I will try reading the chip contents but that will require me to make a custom pin-out adapter to for my EPROM programmer and this is quite low on my priority list at the moment.
Disassembling the S/W would be quite a bit easier and this would give some useful clues on how the emulator functions and what you can do with it. However, without knowing the addresses of the memory and peripheral chips, which are presumably decoded in the CPLD or the PAL chip, it would take some guessing as to which bits of the S/W are talking to which peripheral. Monitoring the address bus and chip select signals with a logic analyser would assist in this area.