Multiplexed SPI sounds like a big can of worms. You'd need to multiplex 4 I/O's in 2 directions 8 times, which does not cut down on the number of chips and just a little on cost (ENC28J60 is 2.35 EUR each, a 4ch mux is probably more like 0.50 EUR).
Also there are no drivers. And I think this is the biggest problem; because I doubt it's even possible to create a pleasing workable system. The ENC28J60 is a nice chip because it has filters like unicast and such, so it drops any frame from the buffer that is not targetted at it's own MAC. If you have 8 linux boxes talking through the same ENC28J60 they would need to be assigned individual software MAC's. They then need to poll the ENC one by one to check if there is a packet they can take. And how are you going to handle stuff like broadcasts, multicasts and packets that do not belong to the cluster? Again: can of worms.
Emulating the ENC28J60 sounds doable, but probably a lot of work even for a dumbed down emulation. And I imagine you need a pretty large FPGA to emulate the frame buffers for each ENC28J60. If you have 8 emulations running, times 8kB of buffer, that's 64kB of RAM + all logic required to basically implement an ethernet switch. All this work for 25 euro worth of chips. Could be fun, but it is an enormous undertaking and ultimately does not add unique business logic that doesn't already exist and you absolutely need to implement in a FPGA.
ENC28J60 and ENC424J600 drivers are already in the kernel and can be used via SPI, but like I said earlier both are limited to around 10-14 Mbit/s respectively.