Sure we do make some noise, aargee, this is an engineering, not a consumer/foolery forum. What a boring blog #683 would have become if we did not. Also bets are many readers have learned some technical things here.
I have to express my gratitude to you, Bud, for the time taken to show how all this PLL stuff works.
4 weeks ago I had no idea of contemporary PLL clock design. Wasn't phase locked loops used in analog TVs?
That's about all I knew - nothing.
But now after downloading and reading and rereading AD pll chip product info, AD pll design white papers, reading yours and MarkL's posts and more
I can keep up with what you are saying. A bit of the spectral world is still a mystery, i.e. why is the 65kHz tone so important...but that will come clear to me soon enough.
Having a broken DS1054Z PLL clock was the driving force to learn about something new (pll clocks) and discover they are used just about in all things radio including mobile phones.
As a result I felt confident to open the DSO, and put in a better designed loop filter, after sniffing the SPI data sent to the pll chip to determine all the programmed parameters.
Thanks again.