EEVblog #636 - FPGA Demo Boards - DE0 Nano

[Fsck]

actually, at their cost, there really isn't much else.

if you want to jump up in cost, the nexys 4 and cyclone 5 gx starter kit are significantly superior options.

[Rigby]

I was pretty disappointed with this blog I am afraid - I know it says it is old footage, but would have been best left on the cutting room floor I think - as it is it just damages the eevblog brand.

The boards shown are too old, and have almost all been superceded, there is no real description or analysis of each board, and (most important to me) there is little comment on the support ecosystem (and here I mean what is provided beyond the likes of Quartus & ISE) for each board - a critical issue in my view. The discussion of Quartus didn't really add too much beyond telling us it has lots of features and is very complex (no shit Sherlock  ).

To be fair, very complex devices like this don't really fit the standard eevblog format, but perhaps there is an opportunity for a slightly different format - a longer term project where you implement something moderately complex (I'd say logic analyser, but that has been done to death) and then provide periodic updates. Ideally, the same project on a number of boards, and then summarise the pros and cons, pitfalls etc. Would make very interesting viewing for those of us interested in FPGA, but I appreciate it would be a significant effort for what is a niche product.

Well EEVblog is not really an FPGA brand, so I'm not sure what gets lost.  Dave has said a few times that he will NOT be doing the long-term project like what you describe again.  He did this with a power supply and apparently got hounded by people for updates ALL THE DAMN TIME.  Also he discovered some very serious flaws in some parts he had counted on using, which required him to return to square one after getting all the way to prototyping PCBs and evaluating enclosures.  I can't blame him; I wouldn't do it either.

[hamster_nz]

... perhaps there is an opportunity for a slightly different format - a longer term project where you implement something moderately complex (I'd say logic analyser, but that has been done to death) and then provide periodic updates. Ideally, the same project on a number of boards, and then summarise the pros and cons, pitfalls etc. Would make very interesting viewing for those of us interested in FPGA, but I appreciate it would be a significant effort for what is a niche product.

And it would go...

(queue the Dave voice)
Yeah, this one has got a jack for DC, this one uses USB for power, and this one has lots of pins, this one costs a little less and this one has more switches and LEDs, but no matta what board you pick there will be times when yool be like a kangaroo with an itch, kicking yourself in the head because you didn't spring for the other one.

Now if you are gonna use these to prototype your own designs yool wanna have a FPGA with a footprint that you can actually reliably solder at home. So that that pretty much rules out anything where a dev boad costs over $100, as they all use the BGA packaged parts. Which is a shame really, as all the reeeeally big parts with niiiice features like SDRAM memory controllers and reeealy high speed I/O are the ones in BGA packages.

Yeah, all these boards pretty much the same, can run much the same designs and most designs HDL can be moved between platforms, well, far easier than most of your low-level micro-controller code that is out there, yool just have to replace a few brand X primitives with ones from brand Y and your away like a dingo on roller-skates.

The FPGA software toolsets are a bit like operating systems or text editors - everybody has their favorite, and likes to trash those who use the others. But they pretty much all suck - they all crash, are are huge downloads and are generally really complex. If you learn one then attempt to use a different brand's IDE yool be lost for days, but if you persist by the time you are on you're on the third or fourth brand you'll see that they are all much the same.
(end of Dave's voice)

Or at least that is how I think it would go!

[FrankBuss]

And it would go...

(queue the Dave voice)
...

Did you watch the videos? I think he actucally said a few things like this in one of the last two FPGA videos

And I think it was a good overview video. You can't go into details unless you want to make a ten hour long video. For me most of it would be boring, because I know already how to use FPGAs, but there are always something you can learn, for example I never used the power estimator in Quartus, didn't even know it existed. And I would learn something if Dave would describe the analog side of FPGAs more, or how to place the decoupling capacitors and route high speed traces on your own boards, or how a hobbieist can route and produce a board with a BGA, or recommendations for cheap assembly houses. So a project with a FPGA from start to a product would be cool. But it's up to Dave what he wants to do, I like the teardowns and mailbag videos as well.

[Tek_TDS220]

Incidentally, there is a 'review' (mostly a listing) of cheap FPGA development boards here: http://edn.com/electronics-products/electronic-product-reviews/fpga-boards-under--100--hands-on-reviews-collection/4431752/FPGA-boards-under--100--Introduction?_mc=NL_EDN_EDT_EDN_weekly_20140703&cid=NL_EDN_EDT_EDN_weekly_20140703&elq=ffd8f46856fc469ba637c6eca8ae63de&elqCampaignId=17864

[miguelvp]

Incidentally, there is a 'review' (mostly a listing) of cheap FPGA development boards here: http://edn.com/electronics-products/electronic-product-reviews/fpga-boards-under--100--hands-on-reviews-collection/4431752/FPGA-boards-under--100--Introduction?_mc=NL_EDN_EDT_EDN_weekly_20140703&cid=NL_EDN_EDT_EDN_weekly_20140703&elq=ffd8f46856fc469ba637c6eca8ae63de&elqCampaignId=17864

Thanks for the link, too bad they didn't include the BeMicro and BeMicro CV for $50 (actually cheaper on some suppliers if you use octopart to find them)
At least to give more Altera presence on the boards since they only list the Nano.

[Isaac000]

One question;

As a beginner to FPGAs (I have some experience with electronics and microcontrollers already), which should I choose; Xilinx or Altera?  ...

Chevy or Ford? Ferrari or Lamborghini? Flip a coin if you're just starting or pick based on which one get get you the least expensive dev kit to play with.

My experience:
Whether you are Altera or Xilinx depends on the local rep. In the areas where the Xilinx rep is great, most people do Xilinx and vice-versa where Altera was really good.

I started with both (as luck would have it we ran 2 projects, one with Xilinx and one with Altera). The silicon is fairly comparable, but depends on any specifics of your application. Xilinx software, ISE, was pretty good up until about version 7, after that it was super buggy and crappy and everybody hated it (wasn't just us, our local rep said that was their number one complaint). I think they clued in around version 13 or so and things may have gotten better since then. Altera Quartus has been fairly consistent and just from that initial experience, I still prefer Altera to this day.

[jancumps]

For self-training purpose, I didn't base my choice on FPGA manufacturer.
I based my choice on budget,  what demo board and community I liked most, and where I could find good tutorials.
Papilio + hamster's tutorial, and my old wish to own a logic sniffer, made me go for Xilinx (Papilio can be turned into a sniffer).
My other choice would be one of the xess.com boards, because I like David's drive and style. Xess is doing Xilinx too.
I couldn't choose, so it was kind of a coin flip

I didn't find it too difficult to switch between µC families. I guess changing FPGA type is not that hard eather once you know the subject.

[Dave Turner]

In the past with microprocessors I found that once the basics of one was crammed into my head switching to another became almost trivial provided I had a good manual. Then, for me, all coding was on paper manually converting from assembly to hex.

FPGAs are more complex so in addition to the technical manual It is the availability of good tutorials which will determine my choice of evaluation board.

[nvr0hk]

Incidentally, there is a 'review' (mostly a listing) of cheap FPGA development boards here:

Thanks for the link, too bad they didn't include the BeMicro and BeMicro CV for $50 (actually cheaper on some suppliers if you use octopart to find them)
At least to give more Altera presence on the boards since they only list the Nano.

Thank for the EDN's FPGA boards under $100: Introduction, and in comments, through Joel WILLIAMS's CheapFPGA Development Boards, I found this kickstarter project miniSpartan6+, I pledged $99 for it, but I don't know if it is really a beginner's platform even with their Scarad IDE because in the end you need to download the heavy Xilinx's  free tools and running Linux under an X86 platform...
Their last stretch goal for upgrading to an Spartan 6 LX9 with an FBGA256 (not reached at now) will push hard their power supply design, IMHO!

[jancumps]

... I found this kickstarter project miniSpartan6+, I pledged $99 for it, but I don't know if it is really a beginner's platform even with their Scarad IDE because in the end you need to download the heavy Xilinx's  free tools and running Linux under an X86 platform...
Their last stretch goal for upgrading to an Spartan 6 LX9 with an FBGA256 (not reached at now) will push hard their power supply design, IMHO!

I missed the Linux under X86 requirement. Where is that stated?
They just announced that they are going to deliver the stretch goal even if not reached.

[nvr0hk]

I missed the Linux under X86 requirement. Where is that stated?

In Vivado Design Tools the 2014.2 - Release Notes at the beginning of page 9, they stated in paragraph Operating Systems this: "Xilinx only supports the following operating systems on x86 and x86-64 processor architectures.". I don't see one ARM platform supported, or I missed something somewhere?

They just announced that they are going to deliver the stretch goal even if not reached.

yes, they even offer an upgrade for Spartan LX25 if you add +30$ , but, is it supported by the Free ISE WebPACK Tool?

[miguelvp]

I will doubt Xilinx or Altera supported arm processors for their toolchain. The most I've seen is the Cypress PSoC that can use Android to upload the configuration.

[jeremy]

I will doubt Xilinx or Altera supported arm processors for their toolchain. The most I've seen is the Cypress PSoC that can use Android to upload the configuration.

You can do this via linux on the zynq as well.

Allow me to pose a slightly different question to those in the know: given that most of the work is done in simulation, are there simulators out there that are better than using the vendor toolchains? Also, are there any that would be viable for a hobbyist in terms of cost?

[bwat]

I will doubt Xilinx or Altera supported arm processors for their toolchain. The most I've seen is the Cypress PSoC that can use Android to upload the configuration.

You can do this via linux on the zynq as well.

Allow me to pose a slightly different question to those in the know: given that most of the work is done in simulation, are there simulators out there that are better than using the vendor toolchains? Also, are there any that would be viable for a hobbyist in terms of cost?

I use iverilog and gtkwave for simulation which cost me nothing. I only use Quartus II, which was also free, when I'm at the end of the project and the FPGA is about to be programmed. If you're on a *nix machine try the following:

Code: [Select]

iverilog -o d_latch d_latch.v && vvp d_latch && gtkwave d_latch.vcd
 Here's the d_latch.v file:

Code: [Select]

module d_latch(Q, Qn, G, D);
   output Q;
   output Qn;
   input  G;   
   input  D;

   wire   Dn;
   wire   D1;
   wire   Dn1;

   not(Dn, D);   
   and(D1, G, D);
   and(Dn1, G, Dn);   
   nor(Qn, D1, Q);
   nor(Q, Dn1, Qn);
endmodule // d_latch
   
module d_latch_tb;
   reg D;   
   reg G;
   wire Q;
   wire Qn;
     
   d_latch dut(Q, Qn, G, D);

   initial begin
      $dumpfile("d_latch.vcd");
      $dumpvars(0,dut);
      G <= 0;
      D <= 0;
      #1 D <= 1;     
      #1 G <= 1;     
      #1 D <= 0;     
      #1 D <= 1;     
      #1 $finish;     
   end

endmodule // d_latch_tb

You'll get output like that found at the bottom of this webpage http://www.barrywatson.se/dd/dd_d_latch.html.
 A more involved simulation waveform example here:http://www.barrywatson.se/dd/dd_datapath.html. I use this sort of setup to run through tests for CPU designs with no problems. I have it all in a makefile so I just type "make" and all the tests are compiled and the simulations are run and the outputs are checked with C programs which the makefile also builds.

[miguelvp]

Just an FYI,

I don't know when it happened but Terasic updated their documentation and samples to include QSys examples and use of SDRAM with the NIOS II. The user manual has been updated to version 1.9

Seems that their webpage is experiencing problems and you have to sign in to get the CD content, no sign in necessary for downloading the manual. But the CD has 2 extra and updated manuals for My_First_Fpga_v1.0 and My_First_NiosII_Qsys under the Usermanual directory.

Link for the DE0-Nano resources:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593&PartNo=4

Direct link to the downloads (supposedly you need to be signed in on terasic.com.tw first but might work without signing)
http://www.terasic.com/downloads/cd-rom/de0-nano/


The latest CD Rom is version 1.2.0. I think mine came with V.1.0.9 or maybe 1.1.0 but the newer CD is more than twice as big (74 MB compared to 30 MB)