EEVblog #636 - FPGA Demo Boards - DE0 Nano

[EEVblog]

Dave checks out several FPGA demo boards, and tries out the DE0 Nano and Altera Quartus II software.
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=593

[Legit-Design]

Many people complained on youtube already... 17:10 got some audio weirdness
Starts at 16:20 or so.

EDIT: It gets really annoying really fast, not your usual production quality 

[Rerouter]

Yet to watch it, and currently downloading slowly..

 purchased the non nano version of him 2 days ago as it looked like a nicer dev board to me, so i'm hoping i haven't made a mistake

[EEVblog]

EDIT: It gets really annoying really fast, not your usual production quality 

Yes, sorry, something went wrong on the screen capture source files. Can't be fixed in the edit, so it is what it is.
This is very old footage, and I was not about to go and re-record the whole thing.

[janoc]

Dave, for the Papillio series of boards (both Papillio One and the Pro), there is this wonderful learning board:

http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing

There is an entire tutorial book for it, I went through it and works pretty good.

It is probably better value than the all-integrated boards like the Nano or BASYS - you can use the cheaper bare Papillio for projects that don't need the learning board's hw.

[nowlan]

I always called it terr-rasic (like Jurassic park) although i may well be wrong.
The nano is certainly affordable, but a lot of books, uni curses, website support the de-2 boards more.
Something to keep in mind.

I think mike liked the MachXO2 lattice boards, $35. Dunno how good to learn on.

[EEVblog]

I always called it terr-rasic (like Jurassic park) although i may well be wrong.

I like that.

The nano is certainly affordable, but a lot of books, uni curses, website support the de-2 boards more.
Something to keep in mind.

This is the one they sent me at the time (this video was shot last Nov, and I got it before that)

[FrankBuss]

Dave, do you plan to do some projects with the ZedBoard? The Zynq chip is very powerful. I have a Parallella board (costs half of the ZedBoard and has an additional special 16 core parallel chip from Adapteva), with a Zynq 7020. I started to implement a 64 channel / 100 MHz logic analyzer for it. Once you have learned XPS, PlanAhead and all the other Xilinx tools and IPs, it is easy to implement a memory mapped interface on the FPGA for the ARM cores.

This is a first version and all you need to code (besides some connections in the parent entities):

https://github.com/FrankBuss/parallella-hw/blob/sampler/fpga/edk/parallella_7020_hdmi/pcores/sampler_v1_00_a/hdl/vhdl/user_logic.vhd

You can use it from Linux like this:

https://github.com/FrankBuss/parallella-hw/tree/sampler/sampler

Needs still some testing. Writing a testbench for it would be a lot of work, so I just test it on the board itself with some generated signals from the same entity, which is sufficient for a hobby project. Currently I'm using the internal block RAM, because it is easier to use, and the dual port configuration has no problems with concurrent memory access when the ARM cores do other stuff, but the AXI4 bus allows to access the shared 1 GB DDR RAM as well. A 64 channel logic analyzer or signal generator with half a gig of RAM would be nice.

[cloud_constructor]

ffFFfff... dont know why but im afraid to get involved with FPGAs.... I`ll probably end up in a dark room surrounded  by half finished projects...

[FrankBuss]

ffFFfff... dont know why but im afraid to get involved with FPGAs.... I`ll probably end up in a dark room surrounded  by half finished projects...

It can be a lot of fun to do FPGA projects. Unlike microcontrollers, you can implement all the hardware modules you need yourself. Once you've learned VHDL or Verilog, it is even easier to implement a simple PWM controller with a few lines of code, than to read and understand all the configurations and special cases of the registers of a modern microcontroller to do the same.

Of course, it doesn't hurt if you already know how logic gates, flipflops etc. work, because you don't write sequential "programs", but the program you write is an abstract description of a schematic, which the tools synthesize to a hardware configuration, and these hardware elements run all in parallel, same as a real digital circuit. Needs some time to get used to it.

[jancumps]

ffFFfff... dont know why but im afraid to get involved with FPGAs.... I`ll probably end up in a dark room surrounded  by half finished projects...

I jumped in a few days ago. By accident, because I wanted to order a Bus Pirate at Seeed.
To avoid  shipping costs I added a Papilio Pro.
Just a lucky coincidense that the EEVBlog FPGA video's went live.

I'm doing ok at the moment. I learned the basic binary manipulations for single ports and bus manipulatiuon. Next is clocks.
I also found code to use the Pro as Logic Sniffer compatible device. So if I fail my training, at least I have an (up to 3.3v) analyser.

[hamster_nz]

Dave,

Just a word of warning.... the Osc on the Basys2 is utter, utter, utter crap. Hook a scope up to a scope and see how bad it is.

Nearly all LCDs will fail to sync with any VGA signal you generate with it, and on a CRT it looks like crap - you will need to get a decent XTAL it you plan to generate any sort of video.

Dave, if you want one I'll see if I can get Jack @ Gadget Factory to send you a LogicStart for your Papilio One - http://www.gadgetfactory.net/logicstart-megawing/

It will give you switches, buttons, VGA, DAC, 7seg and other goodies, and best thing is that you can unplug all of it when you build your own projects.

Mike

[jancumps]

Are you the hamster from the FPGA intro that I'm currently following?

[hamster_nz]

Are you the hamster from the FPGA intro that I'm currently following?

Maybe....

Code: [Select]

if good_things_to_say = '1' then
   thats_me <= '1';
   run_away_and_hide <= '0';
else
  thats_me <= '0';
   run_away_and_hide <= '1';
end if;


[jancumps]

It's '1'

[hamster_nz]

It's '1'

Phew - maybe I should make that a constant...

[marshallh]

DE0 nano is better board for fpga noobs. It has a Cyclone IV E on it.

DE0 (older, larger board) has a Cyclone III which as of today is no longer supported by the newest Quartus (14.0). So get 13.1sp1 if you plan to use Cyclone III.

And if you're using the old Cyclone II, 13.0sp1 is the last version for that.

[hamster_nz]

DE0 nano is better board for fpga noobs. It has a Cyclone IV E on it.

DE0 (older, larger board) has a Cyclone III which as of today is no longer supported by the newest Quartus (14.0). So get 13.1sp1 if you plan to use Cyclone III.

And if you're using the old Cyclone II, 13.0sp1 is the last version for that.

I had a DE0-nano and didn't like it for tinkering with. My reasons might be your reasons for liking it, so here they are.

* I feel that it is aimed at as a tech demo for the NIOS II processor. That processor is licensed in a model that requires it to be teathered and will only work for an hour unless you spend $

* The switches are too few and too small for tinkering with. Perfect as reset of config switches but that is about it. I don't want to be poking things with biros.

* Nearly anything experimentation you want to do requires you to have a breadboard and jumper wires out - not very easy when working on the sofa as I do

* The USB interface looks like JTAG, where as I prefer serial (RS232) bridges for ease of integration into software

Now it is a great board to integrate into a low cost project (e.g. Mark Atherton's DVB-S project at http://www.idesignz.org/DigiLiteZL/DigiLiteZL.htm), but for a beginner I think something with more onboard I/O allows you to concentrate on the learning without the distraction of wiring up your own hardware. The Basys2 would be the perfect starter board if it wasn't for the crappy XTAL!

You can find my attempts at running uClinux on the DE0-nano at http://hamsterworks.co.nz/mediawiki/index.php/UClinux/Building_for_the_Terasic_DE0-nano_on_Fedora_14

[FrankBuss]

* I feel that it is aimed at as a tech demo for the NIOS II processor. That processor is licensed in a model that requires it to be teathered and will only work for an hour unless you spend $

Altera changed that some years ago, the "economy" version is free now:
http://www.altera.com/devices/processor/nios2/cores/economy/ni2-economy-core.html

[miguelvp]

I go for the DE0 Nano more than my other boards. It has a lot of GPIOs and it's spartan enough so you don't get distracted with other things. Also the speed rating is 6 so it's faster than other boards. And the size is just perfect, I also like that I can use old IDE ribbon cables.

You can buy generic accessory boards, use a few jumper cables and have a blast learning. Well at least I do find it fun.
http://www.wvshare.com/column/Accessory_Boards.htm

As for complicated, the DE0-nano has that myfirst fpga sample that should help any uninitiated to start learning in a well organized step by step tutorial. I don't care much for the avalon interface or soft cores I want to learn to drive them myself from the datasheets.

If I wanted an mcu then I'll get the $200 DE1-SoC Board with an embedded dual-core Cortex-A9. The FPGA in it goes for over $200 in Qty 100.

If you want cheap, the BeMicro CV goes for $35 at Verical (found it via octopart). Although not starter friendly since it lacks samples and even their hardware guide doesn't include the MicroSD pins, luckily the schematic and an older version of the guide includes them. It couples with Analog devices dev boards via a $50 adapter (too expensive) also you can hook it to the BeUSB 3.0 that uses the Cypress FX3.0 usb hub chip and verical has it for $72 (normally $99).

As for CPLDs Altera's Max V are really FPGAs in disguise, on their newly announced Max X series they are actually categorizing them as full fledged non-volatile FPGAs.

On top of that Intel's announcement of Xeon with FPGAs built in (probably Alteras since Intel let them use their 14nm trigate tech) makes it more interesting. As a programmer it would give me an edge if they catch on beyond the data centers.

[ukee1593]

One question;

As a beginner to FPGAs (I have some experience with electronics and microcontrollers already), which should I choose; Xilinx or Altera?  Is one better than the other in any meaningful way, or should I just flip a coin and go/stick with whichever one, (yes I understand that it would be foolish to ONLY use Altera over Xilinx because that was the one you learnt with, but there will be a learning curve between the two platforms I'd imagine, in terms of software suite/etc). 

I like the idea of the Zed board with the ARM hardcores with the FPGA on the same chip, and even better that there is a Dave Jones special edition!  I'd also like to point out that Terasic also have a SOC board available in this range; the DE1 SOC http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=836&PartNo=1 which has some more standard connectors for the GPIO which might make it easier to start out with (and cheaper than the Zedboard, plus breakout). 

One disadvantage (at least it was a while ago) is that the Altera cyclone V SOCs were difficult to buy (as chips separate from a dev board), so perhaps not very useful if you are needing to manufacture with one of them. 

[jesuscf]

When I was a complete noob with FPGAs back in the year 2000, I found this book quite useful:

Rapid Prototyping of Digital Systems by James O. Hamblen (Author), Michael D. Furman (Author)

The book got me going with MAX+PLUS II (Altera's FPGA software at the time) and the UP1 board in just a few minutes.  There is a newer version of the book:

Rapid Prototyping of Digital Systems: SOPC Edition by James O. Hamblen (Author), Tyson S. Hall (Author), Michael D. Furman (Author)

Which uses Quartus II with both the DE1 and DE2 boards.

[Russ.Dill@gmail.com]

Don't forget you can also get your feet wet with something like Icarus Verilog and GtkWave, Xilinx's Isim, or others. Really, the majority of an FPGA project always seems to be running your code in a simulator anyway.

[edpalmer42]

What's the general feeling/experience regarding this board?  It has been mentioned a few times on the forum, but nothing significant.

https://www.tindie.com/products/MicroNova/mercury-dip-fpga-board/

I may have an upcoming project to replace an obsolete IC.  This looks attractive due to the form factor and the 5V I/O.  It could be a one-stop solution.  I have zero experience with FPGAs - hell, I can hardly spell it - so I don't want to make a stupid choice right off the bat.

I'm not associated with the vendor.

Ed

[tja]

I was pretty disappointed with this blog I am afraid - I know it says it is old footage, but would have been best left on the cutting room floor I think - as it is it just damages the eevblog brand.

The boards shown are too old, and have almost all been superceded, there is no real description or analysis of each board, and (most important to me) there is little comment on the support ecosystem (and here I mean what is provided beyond the likes of Quartus & ISE) for each board - a critical issue in my view. The discussion of Quartus didn't really add too much beyond telling us it has lots of features and is very complex (no shit Sherlock  ).

To be fair, very complex devices like this don't really fit the standard eevblog format, but perhaps there is an opportunity for a slightly different format - a longer term project where you implement something moderately complex (I'd say logic analyser, but that has been done to death) and then provide periodic updates. Ideally, the same project on a number of boards, and then summarise the pros and cons, pitfalls etc. Would make very interesting viewing for those of us interested in FPGA, but I appreciate it would be a significant effort for what is a niche product.

Cheers

Tim