EEVblog 1639 - Keysight HD3 Oscilloscope Teardown

[EEVblog]

Teardown of the new Keysight HD3 14bit Megazoom V ASIC oscilloscope
https://www.keysight.com/us/en/products/oscilloscopes/infiniivision-2-4-channel-digital-oscilloscopes/infiniivision-hd3-series-oscilloscopes.html

[hans]

Surprising to see that current clamp on the 50Hz mains input for presumably the AC trigger (or would that be on the PSU daughterboard). Wouldn't a current coil give a current instead of voltage trigger? (Or is my sleep deprivation making me think that )

How would they guarantee that the power factor (correction) of the main PSU is predictable and constant? And wouldn't the PFC (slightly) change depending on the load on the PSU?
So what would happen if you change the screen brightness or use a high power device from the USB ports? Or the mains voltage changes? How low would the jitter/accuracy be?

Maybe something interesting to test because intuitively I would have my doubts whether probing the current waveform would really give that stable of a 50Hz trigger source.

Other than that the design looks great.

Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.

[EEVblog]

Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.

Untimately I don't think that's too much to do a modern FPGA. Although it does have a heaksink so I guess it's doing somethign reasonably complex.

[Someone]

Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.

Would need Keysight to release the architecture details but my guess is it is likely the waveforms are being aggregated/overlaid/plotted in the ASICs.

[EEVblog]

Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.

Would need Keysight to release the architecture details but my guess is it is likely the waveforms are being aggregated/overlaid/plotted in the ASICs.

IIRC that's what the Megazoom IV did. So this would be no different.

[Codex]

CPU Boards is a third party product.

congatec GmbH, looks like its the conga-SMX8X board

https://www.congatec.com/en/products/smarc/conga-smx8x/