Restrictions on INTEGS bit manipulation
All,
Is anyone aware of any restriction for bit manipulating INTEGS ?
Let me tell you what I am experiencing. Part is PFS154-S16.
I have a complex interrupt routine that triggers on PA0 edges, but the edge detection changes due to the nature of the algorithm I am using.
For this particular part of the interrupt, PA0 rising edge is being used, PB0 also used as both edges, and T16 is also used as rising edge. This gives a INTEGS value of 0b000_0_00_01., i.e., all bits are zero except for bit 0 (selecting [1:0] as "01" as required for rising edge interrupt).
At some point in the algorithm I need to enable both edges interrupt on PA0, and I need to do this from the interrupt routine (and when processing an PA0 interrupt - also the interrupt is acked immediatly at ISR entrance). For that purpose I manipulate only the bit0 of INTEGS, setting it to '0' to select both edge interrupt. This is done in assembly using:
set0 _integs, #0 // Activate interrupt on both edges
So far so good, I can see the interruptions coming in when edge changes, either rising or falling.
Now, at another point in the algorithm I need to re-enable only rising edge interrupts (also from within the interrupt routine, and while processing PA0 falling edge interrupt). But when I do this:
set1 _integs, #0 // Activate interrupt on rising edge only
I lose both rising and falling interrupts. I see interrupts from other sources coming in, but never from PA0.
After some experimentation, I found out that this below does work, though:
mov a, #1
mov _integs, a // Activate interrupt on rising edge only
So this leads me to believe that there are some restrictions regarding bit manipulation of INTEGS register.
Does anyone have any insight on this ?
Best,
Alvaro