EEVblog #1029 - BGA PCB Fanout

[EEVblog]

Dave looks at some issues with fanning out tiny 0.4mm pitch BGA packages, via pad and hole size, tenting, breakouts, solder mask expansion etc.
And then compares it with an 1136 pin Xilinx Virtex 5 FPGA with 1mm pitch to show the difference in PCB process technologies needed.

[free_electron]

Tenting vias is a bad idea. Encroach them.
Tented vias are no guarantee that the cavity is completely closed. Closed or not : there is an issue

- If it is completely closed the soldermask may popcorn during reflow due to the trapped air expanding. Any moisture trapped inside is also problematic. That moisture may be a volatile compound of the soldermask ink itself. Popcorned soldermask is a humidity and impurity trap later in the process.

- if it is half open it will trap moisture for sure. Also : flux may wick into the cavity leading to a cleaning nightmare. Any flux remnants that wick into the cavity are extremely hard to wash out , especially under a BGA. The washing solution itself may get trapped in there.

Any humidity remaining , flux remnants and all (basically surface impurities ) will lead to CAF (conductive anodic filament) growing during powerup. CAF can build in minutes. With fields as low as 1 volt/mil .

If you think tin whiskers are bad .. wait until you deal with this misery...
For example : Water soluble flux is a pest. it needs to be removed completely.

Single sided capping is a possibility but then make sure to open the other side. Always hard specify this in the gerber data. Do not leave this to the board house.
Altium 16 and later has new options now to specify encroaching from the hole edge and separate top and bottom encroach spacing So you can run a post layout cleanup.

anything that is not marked testpoint : tent topside and encroach backside to hole edge. for safety : retract 3 mils larger than hole size. if it is a testpoint : open it completely on testpoint side 3 mils over pad diameter, and tent the other side.

https://www.parkelectro.com/parkelectro/images/CAF%20Article.pdf

[PeterL]

^^^
Very interesting, I use via tenting a lot and never realised they could have this kind of problems. But I have never heard of encroaching, can you explain what this is?

[EEVblog]

^^^
Very interesting, I use via tenting a lot and never realised they could have this kind of problems. But I have never heard of encroaching, can you explain what this is?

Encroaching is extending the solder mask onto the pad (i.e. "encroaching" upon the pad) but not covering it completely. i.e. leaving a small hole in the middle.
You get the advantage of increased solder mask distance from pad to conducting via, but none of the issues Free_Electron mentioned (which can be major if you get them, but most boards have no such issues and fully tended vias are common as mud in the industry).
But yes, there are lots of more obscure fascinating issues like this in PCB design and manufacture.

[free_electron]

A via that has no components over it on either side will, generally be fine. The trouble starts with a via that is hidden under component. Those are cleaning nightmare.
Especially under BGA part. any flux remnant that has not been fully activated will, over time, become corrosive and conductive. Have that stuff end up inside a cracked soldermask and it will eat away the plating over time. For long-term reliability it is advised to leave the vias open so that they can be properly washed and baked without the soldermask popcorning.

If the mask popcorns due to venting it may create tiny solder balls during reflow that can get trapped under the bga, leading to failures years later. Vibration may shift those ... or one ball may have some solder blown off and that will become a weak joint that may give out after years of vibration.

A lot of long term field failures can be avoided by proper layout rules.

[A Hellene]

Quite interesting (and useful) information, dear Vincent!
Thank you!

By the way, long time, no see... I hope this message finds you well, healthy and happy.

-George

[ali_asadzadeh]

Thanks Dave, I think you should include High speed PCB design tutorials too, like DDR  also a pin swap pin video would be nice too.

[nctnico]

One of the things to consider is to keep the assembler in the loop. What works for one doesn't work for the other so you can't really use generic rules. I usually don't bother much with how the board is finished exactly. The assembler (usually) tunes the gerbers and PCB manufacturing data to match their soldering process. For example: some plug the vias and others don't.