That transistor current-source is going to be temperature-sensitive, which may or may not be a problem for you. Going back to the resistive divider, here's one way to solve for the values.
First, say the DAC output range is 0-3V. You want to have a feedback voltage range of 0.776 - 0.824V. That's a 0.048V range, so that's the first step, create a resistive divider that drops 3V down to 0.048V. See the schematic below, that's the top circuit.
Next, shift the output voltage up to the desired level by replacing the ground with an offset voltage. This is still a simple voltage divider calculation. See the middle circuit.
Next, create that offset voltage with a voltage divider, having the same "Thevenin equivalent" resistance as in the previous circuit. Here, it's 1 Ohm. In the bottom circuit I used 3.3V to feed the divider, but you can use whatever stable voltage you like.
Finally, scale up all the resistor values to something practical, perhaps 1000X. You don't want to load down the DAC output or draw excessive current from your supply. You should allow for DAC output impedance, and regulator input impedance, but this is a good starting point.
This will be only as precise as your resistors and voltages, but this is how you can calculate the values.
Coming back to this. The first time I read it I got lost at "Thevenin equivalent".
In my parallel attempts with falstad (as a ball park tool where I can change things and see the response without the ordeal of LTSpice). We did not take the same approach.
One aspect is that the divider voltage, input voltage, output voltage and output load are all subject to change. I tend not to find easy problems it seems.
The input VMAX (or VCC) is basically going to be "Solar panel Voc", possibly 19V. The output voltage and current will be controlled to produce a 3.0V to 4.2V charge curve for a Lithium cell. The micro-controller is 3.3V.
In my circuit the resistors in question are the 32k, 68k and 8.2k with the later being fixed in my current case. I don't understand the maths, but I can play with the 32k and 68k and garner some insight into how the effect each other.
I found the 68k seems to almost directly impact the amplitude of the VDAC's effect on the voltage. Lower values give the VDAC more control and vice versa. The 32k however would naturally be around 35k to get a 4.2V output with no VDAC and tends to have the effect of moving the centre point of where the DAC has influence.
The difficult bit is, changing any one of them also impacts the others. Changing the 68k to give the DAC a wider amplitude or more influence, results also in a shift in the offset. Changing the 32k to change the offset changes the amplitude.
Sometimes I would get it to balance and then test sanity by grounding the VDAC to simulate a MCU crash and results in 5 or 6V on the output because VDAC has far too much influence.
I'm getting round to testing this in physical, by using 10 turn trim pots for the 68k and 32k, having pre-set/measured them at those approximate values.
It takes me back to the very first article on this as to what the tuning will involve. For every component the tolerances mean it can have a max, min and typ value. I need to make sure that under all combinations of those min, max values that no "do not exceed" conditions exist. Such as the maxmimum lower end of the VDAC influence when all components are working against it, does not produce a voltage over 4.2V. Ideally without having to cap it with a voltage limiter circuit.
For that part. I need to convert these resistor calculations into code so that I can understand them... and hopefully re-use them to calculate voltages and responses correctly in the code that will control the buck. Such that it can take a voltage sense value and extrapolate out the "real" voltage, determine the response and then convert that back into DAC volts, using the same calculated and measured component values.