What kind of components can be put in IC's

[alank2]

I find it interesting that you can recreate so many IC's in an FPGA and this got me to wonder - are IC's limited to the type of components you can put in them?  In other words, you have a type like "cmos" and everything in the IC is cmos type transistors and connections, but nothing else?  Or can you put resistors, capacitors, and other passives in IC's as well?  How does an FPGA deal with those?  Or can't it because it can only handle "digital" IC's which are limited to logic?

Also, second question bouncing around my head - how were the first cpu's made?  Were all the gates laid out by hand on some sort of a large camera read type material and then shrunk down?

[ataradov]

is cmos type transistors and connections, but nothing else?  Or can you put resistors, capacitors, and other passives in IC's as well?

You can, and most actual ICs do. RF components are full of black-magic stuff, most modern MCUs have ADCs, ACs, PLLs in them, which are analog components. They are all done in CMOS process, of course, but they are not build out of logic gates.

  How does an FPGA deal with those?

They don't. You can't make an ADC in an FPGA without use of external components, for example.

Were all the gates laid out by hand on some sort of a large camera read type material and then shrunk down?

This. The first masks were just simple photocopies of hand-drawn layouts.

[T3sl4co1l]

Note: the kind, value, and quality of parts matter, too!

Semiconductors: very closely matched.  Want a "1N4148" with precisely the same voltage drop, and temperature, as a literal handful of "2N3904"s?  You can have precisely that.  Prefer MOS?  You betcha.  Same ideas apply!

Resistors: Very good matching by ratio.  Poor manufacturing tolerances (+/- 30% typically).  May have a high tempco (bulk silicon is a PTC material).  But again, they're all the same, so you can do any ratio you please.

Capacitors: usually modest to good quality factor. Can be formed from MOS (in which case C varies with V), or MOM (high Q, stable C).  Large values are 10s of pF.  You don't get much capacitance on chip.

A lot of circuits are contrived simply because capacitors are hard, and inductors are absurd.  An entire op-amp section, buried within a control circuit, might be used just to magnify an internal compensation capacitor, or synthesize an inductor (using a gyrator circuit).

Capacitor matching is as good as any other, and I think the tolerances are similar to, or better than, resistors.

There are also ferroelectric capacitors, i.e. using a special dielectric (usually barium titanate, same as found in e.g. X7R capacitors) to offer much higher capacitances in a small volume.  However, these are limited on size: ferroelectricity is a bulk effect, and disappears when the material is made smaller than the typical electric domain size.  (This is why FeRAM remains relatively expensive and not very dense: the cells are limited to about 200nm.)

Inductors: you're kidding, right?

Inductors are actually possible!  But it's only a recent thing.  Four reasons:

1. It takes a metric shitload* of space around a conductor to support a magnetic field.  You can't usually afford this.  Value scales linearly with size, so an inductor 10um across isn't going to have more than ~pH of inductance.

*This is a technical term.

2. Quality factor is terrible, because of three reasons:
a. The conductor is bad.  A very thin (10s or 100s nm?) layer of aluminum or strongly doped polysilicon (or also copper, these days) is usually in use.  It's just too resistive for most frequencies.
b. The substrate is bad.  The magnetic field must penetrate the substrate, but the substrate is doped and conductive, so eddy currents are induced in it.  It's like winding a coil around a solid steel bolt, instead of a ferrite rod.
c. There's just no space for it.  A planar spiral 10um across, would like to have a volume (for the magnetic field) about as far across (height/depth axis).  But there's substrate on one side.  So, yeah.

3. Recent high tech fabs use piles and piles of metal layers (that is, layers of SiO2 with traces embedded underneath -- think 3D printed microPCBs).  The height (single digit um?) of eight or ten layers is enough to allow a trace, built on top, to have at least a little space around it for magnetic fields.  Shield walls can be built around it, using via fences (sides) and the first metal layer (bottom).  This allows crude transmission lines and low quality inductors.  (Note: shields reflect magnetic fields, rather than absorbing them.  The inductance is lower with a shield present, but the Q is higher.)

4. What else scales with size?  Frequency.  If we push the frequency up high enough, maybe it doesn't matter!  As it turns out, modern fabs can do an okay job in the 2-20GHz range, using spiral inductors and thin transmission lines, achieving a grudgingly-usable Q factor of maybe 5-15 at the inductor's best frequency.

Also, needless to say, it's not practical to build an active inductor using a 50GHz GBW op-amp (which probably could be built, these days, but..), when you're trying to tune and filter a power output stage for Wifi or something like that.  (Active solutions could be used for receive, though...)

Signal processing is done with a massive load of DSP and an ADC/DAC for rx/tx.  Conversion may be direct (i.e., the ADC samples at Fs > Fc) or single (an LO, mixer and filter, followed by a more modest say 100MSa/s converter).  I suppose you could say it's SDR at compile time.


Aside from radio applications, there are also magnetic isolators, which are built a little differently: instead of metal and insulator layers over a finely crafted silicon chip, they use copper inside polyimide (aka Kapton) over an intrinsic (probably?) substrate, which is much cheaper to build.  These still have poor Q factors,

Complementary to capacitors, there may be some research into ferromagnetic core materials.  I could imagine a NiFe film (i.e., Permalloy, or something like it) being applied, with conductors wrapping around a piece to form a basic transformer (or a much better Q inductor).  This can't be made very small, because again, ferromagnetism is a bulk phenomenon, and disappears when the material is smaller than a magnetic domain.

The IBM Racetrack memory thing you may've heard about, was about doing this sort of thing: putting magnetic states into a core with hysteresis, and making it run around (and read and write) at a useful speed.  I don't think it's going anywhere, though.

Tim

[rfeecs]

On layout of the first CPUs, look up Federico Faggin on his history of the 4004 chip at Intel.

The process was something like:
Draw out the layout by hand on grid paper with different colored pencils for different layers.
Use a coordinatograph to measure x,y coordinates of the drawing points.
Feed the coordinates into a plotter to cut a rubylith
Peel the rubylith
Photographically reduce the rubyliths by a factor of maybe 100:1 to produce a glass mask for each layer.

On what components are possible, as has been said, it depends on the IC process.  Look up Bob Widlar and his struggles to get PNP transistors included in the early analog processes that were originally designed for digital circuits.

The economics of ICs are different.  The cost is dependent on the amount of real estate.  For a given process, chip area determines cost.

For a microwave MMIC process, say one that might be used to make the PA in your cell phone, you have a Gallium Arsenide process which has a semi-insulating substrate.  This means you can make good quality transmission lines.  So inductors and even transformers are possible, but take up real estate.  You would also typically have available backside vias (plated holes through the substrate to backside ground), high quality stable thin film resistors, MIM capacitors, NPN transistors, PN diodes and Schottky diodes.  But not PNP transistors.

[wraper]

[danadak]

The first MOS processes were PMOS.

Draw out the layout by hand on grid paper with different colored pencils for different layers.
Use a coordinatograph to measure x,y coordinates of the drawing points.
Feed the coordinates into a plotter to cut a rubylith
Peel the rubylith
Photographically reduce the rubyliths by a factor of maybe 100:1 to produce a glass mask for each layer.

The geometries I worked with were 20 micron.

PMOS was incredibly slow, very sensitive to process contamination, oxide thicknesses
the thickness of bricks, process repeatability very poor. Hi leakage, Vth all over the map,
matching impossible. Period was early 70's.


Regards, Dana.

[T3sl4co1l]

Ya know, I never understood why early NMOS (and/or PMOS, I forget) needed three voltages.  What was that about?  I've never seen an equivalent circuit of the stuff.

Such a mess; good riddance!  Didn't take long for them to come out with proper NMOS (and soon enough, CMOS), but there were still a lot of systems based on that whacky stuff.

Tim

[tooki]

I find it interesting that you can recreate so many IC's in an FPGA and this got me to wonder - are IC's limited to the type of components you can put in them?  In other words, you have a type like "cmos" and everything in the IC is cmos type transistors and connections, but nothing else?  Or can you put resistors, capacitors, and other passives in IC's as well?  How does an FPGA deal with those?  Or can't it because it can only handle "digital" IC's which are limited to logic?

Also, second question bouncing around my head - how were the first cpu's made?  Were all the gates laid out by hand on some sort of a large camera read type material and then shrunk down?

I just saw a vintage video about this a week or two ago, and luckily it was in my YouTube history. Enjoy!

https://youtu.be/z47Gv2cdFtA

[tooki]

Of course, this is the definitive executive summary of how ICs are made:

https://youtu.be/rJp86_tj9KQ

[tszaboo]

The way I understand it, the preferred way to create inductors is to use a capacitor, and connect a gyrator on them.
If anyone wondering, yes, gyrators totally exist, not only in textbooks.

[void_error]

Capacitors: usually modest to good quality factor. Can be formed from MOS (in which case C varies with V)...

So they act like varicap diodes to some extent?

[macboy]

I find it interesting that you can recreate so many IC's in an FPGA and this got me to wonder - are IC's limited to the type of components you can put in them?  In other words, you have a type like "cmos" and everything in the IC is cmos type transistors and connections, but nothing else?  Or can you put resistors, capacitors, and other passives in IC's as well?  How does an FPGA deal with those?  Or can't it because it can only handle "digital" IC's which are limited to logic?

You don't put any components in an FPGA. An FPGA (Field Programmable Gate Array) is a giant array of logic gates with programmable interconnections between them. So when you configure your FPGA you do not change any components inside, only the interconnections between them. I/O pins are handled in a special way, they often have many different functions you can choose from, and the circuitry for all of them exists on the FPGA; you choose which of those circuits gets connected to a given pin depending on what you want it to do. Other folks have already covered the fact, that yes, in general passives can be created on an IC by creative use of the semiconductor and metal layers. That is a very different topic than what you can do with an FPGA.

[ebclr]

Strictly you can't put any component, you only can burn some fuses to interconnect logic and analog modules in some special fpgas. Basically you wire things burning fuses

[SeanB]

Ya know, I never understood why early NMOS (and/or PMOS, I forget) needed three voltages.  What was that about?  I've never seen an equivalent circuit of the stuff.

Such a mess; good riddance!  Didn't take long for them to come out with proper NMOS (and soon enough, CMOS), but there were still a lot of systems based on that whacky stuff.

Tim

Dead simple, you needed a positive supply voltage ( depending on the chip it could be 5V, 12V or anything from 3-15V), a ground connection and then you needed a negative substrate bias voltage, there to make sure all the PN junctions inside are really reverse biased. Later designs that used inproved processes either has better isolation, using another diffusion layer and mask set to get it, or had a small ring oscillator and charge pump ( easy to integrate, as you really did not worry about speed, it just had to work) to generate the negative bias internally, using only a few of diode connected transistors, whatever process part ( CMOS or BJT) that could make the ring of 3 oscillator, and 2 small silicon capacitors, the substrate itself providing the output capacitance.

The latter was common on Eproms, as they needed it, and a slight variation is used on EEPROM to generate the erase and write voltages for the cells. That made them change from needing a 5V rail, a 21V ( or 25V on older parts) programming voltage and a -21V bias supply, to being a single 5V supply and 12V5 programming only.

[T3sl4co1l]

Biased substrate, because they couldn't figure out the gate doping well enough I suppose.  How horrible

Tim

[rfeecs]

Some early NMOS parts had standard supply voltages of +12V, +5V and -5V.  They used non-saturated (linear) enhancement mode logic that required Vgg higher than Vdd.  The -5V could be used to reduce junction capacitance.  Many also used dynamic logic that required transmission gates which would require a voltage higher than Vdd to fully turn on the NMOS gate.

[SeanB]

Capacitor in an ICcan be either a large area diode, run at a specified voltage in reverse, so it is a varicap diode, or a fixed capacitor if the voltage is constant. The other method is to make a large heavily doped silicon resistor ( N or P depending on what is attached to it, or you have to use a few shorted junctions to attach to a metal layer) and then you grow a thin oxide layer( the dielectric, so the thinner the higher the capacitance, but the breakdown voltage increases with increasing oxide thickness) and a top layer of either metal or another grown heavily doped silicon. This makes a good diode with fixed capacitance, but makes for a very large device.

Mostly used in opamps as a compensation capacitor, where you need a small 2-10pF capacitor across the internal junction for frequency compensation. Easily the second biggest component on the die, often as large as the power output stage transistors.