Parasitic inductance is not a design feature, just like noise, drift and other things frequently stated in specifications. An ideal voltage source has zero resistance and zero inductance, the higher the output impedance, the further from ideal. But as rf-loop states, wiring also adds inductance, which may swamp the inductance of the power supply.
Inductance is irrelevant at DC, but it is important for transient response. You can simulate this in LT spice: an ideal DC voltage source, a current source as load drawing a pulsating current of say 1 A, and some series resistance/inductance between voltage source and load. Without parasitic components the voltage will be constant. You'll see spikes appear if you add parasitic capacitance and inductance, although 3 uH is quite low, so you need a fairly fast pulse to see this.