Author Topic: BJTs vs. FETs: Operating Regions (Saturation vs Active)  (Read 8121 times)

0 Members and 1 Guest are viewing this topic.

Offline TimNJTopic starter

  • Super Contributor
  • ***
  • Posts: 1676
  • Country: us
BJTs vs. FETs: Operating Regions (Saturation vs Active)
« on: July 28, 2015, 02:31:10 pm »
Hi everyone,

I don't know why this is so difficult for me to grasp, but I'm hoping someone can help me see the light (and possibly for others too). I've been using a couple different sources, and its tough to figure out exactly what the truth is.

Here are my questions:

1.) What region is appropriate to operate the transistor as a linear amplifier? (It's also come to my attention that the BJT's active region is equivalent to a MOSFET's saturation region. How terribly confusing...)

What I think the answer is: I would think you'd want to operate in "flat" active (BJT) or saturation (FET) region because an increase in Ib or Vgs would make you "jump up" to the next I-V curve (where there is a proportionally greater collector or drain current). If it were operating in the other region, saturation (BJT) or active (FET), then an increase in Ib or Vgs might not result in a linear change in collector or drain current). I think you'd want to bias the base or gate such that it is somewhere in between (half?) the supply voltage to get maximum output swing.

2.) What region is appropriate to operate the transistor as a switch?


What I think the answer is: My gut instinct says the same "flat" region is appropriate because the transistor is "fully on" at a given base/gate bias. I would think you would set Vce or Vds to a point in the right-hand "flat" region. When there is no bias on the base or gate, there is no current in the transistor. When a bias is applied, the maximum current flows in the transistor. (This just seems like a "digital amplifier" to me.)

3.) If what I am saying is correct, what is the sloped section good for? (That's the saturation region for BJTs and the linear region for FETs.)

What I think the answer is: I've read/heard-through-the-grapevine that this area behaves as a current/voltage controlled resistor. And now I suppose this makes sense because I remember plotting the I-V curve of some resistors in physics class and the slope of that curve was proportional to its resistance. In the same way, at a set Vce or Vds, adjusting the base or gate bias would again make you "jump up" to another I-V curve, except the new curve has a different slope and thus a different dynamic/effective resistance.


Thank you so much. I've been struggling with this for a while. My end goal is to teach others electronics (through my youtube channel) so they won't have to be confused by this either. But first, I need to learn it myself!  ;)

Thanks again.
« Last Edit: July 28, 2015, 02:34:49 pm by TimNJ »
 

Offline w2aew

  • Super Contributor
  • ***
  • Posts: 1780
  • Country: us
  • I usTa cuDnt speL enjinere, noW I aR wuN
    • My YouTube Channel
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #1 on: July 28, 2015, 02:47:36 pm »
Hi everyone,

I don't know why this is so difficult for me to grasp, but I'm hoping someone can help me see the light (and possibly for others too). I've been using a couple different sources, and its tough to figure out exactly what the truth is.

Here are my questions:

1.) What region is appropriate to operate the transistor as a linear amplifier? (It's also come to my attention that the BJT's active region is equivalent to a MOSFET's saturation region. How terribly confusing...)

What I think the answer is: I would think you'd want to operate in "flat" active (BJT) or saturation (FET) region because an increase in Ib or Vgs would make you "jump up" to the next I-V curve (where there is a proportionally greater collector or drain current). If it were operating in the other region, saturation (BJT) or active (FET), then an increase in Ib or Vgs might not result in a linear change in collector or drain current). I think you'd want to bias the base or gate such that it is somewhere in between (half?) the supply voltage to get maximum output swing.

2.) What region is appropriate to operate the transistor as a switch?


What I think the answer is: My gut instinct says the same "flat" region is appropriate because the transistor is "fully on" at a given base/gate bias. I would think you would set Vce or Vds to a point in the right-hand "flat" region. When there is no bias on the base or gate, there is no current in the transistor. When a bias is applied, the maximum current flows in the transistor. (This just seems like a "digital amplifier" to me.)

3.) If what I am saying is correct, what is the sloped section good for? (That's the saturation region for BJTs and the linear region for FETs.)

What I think the answer is: I've read/heard-through-the-grapevine that this area behaves as a current/voltage controlled resistor. And now I suppose this makes sense because I remember plotting the I-V curve of some resistors in physics class and the slope of that curve was proportional to its resistance. In the same way, at a set Vce or Vds, adjusting the base or gate bias would again make you "jump up" to another I-V curve, except the new curve has a different slope and thus a different dynamic/effective resistance.


Thank you so much. I've been struggling with this for a while. My end goal is to teach others electronics (through my youtube channel) so they won't have to be confused by this either. But first, I need to learn it myself!  ;)

Thanks again.

It is confusing because BJTs and FETs use the same name (saturation) for two different regions. 

For a linear amplifier application, you've basically got the description correct in #1.

For a switch application, you want as little voltage drop across the device as possible (just like a real switch).  So, that means minimal Vce for a BJT and a minimal Vds for a FET.  This means operating on the lefthand side of the plots - the saturation region for the BJT, and the linear region for the FET.


YouTube channel: https://www.youtube.com/w2aew
FAE for Tektronix
Technical Coordinator for the ARRL Northern NJ Section
 

Offline TimNJTopic starter

  • Super Contributor
  • ***
  • Posts: 1676
  • Country: us
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #2 on: July 28, 2015, 03:34:39 pm »
Thank you fellow New Jerseyan!

If there's anything glaringly wrong with my explanation in #1, please don't hesitate to shoot me down.

Here's how I interpreted what you said: As far as the switch goes, you'd set Vce or Vds such that it could pass enough current to switch the load on or off, but not more so that there is unnecessary voltage drop across the transistor. Would setting just on top of the knee of that curve make any sense? Or can it be anywhere on that sloped section?
 

Offline Zero999

  • Super Contributor
  • ***
  • Posts: 19694
  • Country: gb
  • 0999
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #3 on: July 28, 2015, 03:56:46 pm »
It is confusing because BJTs and FETs use the same name (saturation) for two different regions.
Who's silly idea was that?
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22030
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #4 on: July 28, 2015, 04:00:12 pm »
For simplicity, in this thread, let's call "saturation" == voltage saturation, the low voltage, low incremental resistance region on the output (Vce vs. Ic or Vds vs. Id) curve.

(For historical note: triodes have a fairly constant output resistance, so by this definition, would always be in saturation, even in the "linear" range (which they're never really out of, either*).  This is interesting, because triodes appear to be the only "constant voltage" amplifying device -- all others are either constant current (three or more terminals: pentodes, transistors) or negative resistance (two terminals).)

What characteristics are desirable in switching?  The output voltage should be either a good solid '0' or a good solid '1'.  You can get a good solid '1' in cutoff, because the voltage simply rises to its open circuit value, regardless of resistance.

But you can't get a good solid '0' in the linear range, because the voltage is practically undefined -- supplying only a constant current, if the load resistance varies, the output voltage varies proportionally.  A pretty crappy zero!  However if we saturate the device, it can sink extra current, accounting for a possible change in load resistance, and maintaining a good solid '0'.

It's worse.  The output current of a BJT or MOSFET is poorly defined, being dependent on hFE and Vbe, or Vgs(th) and g_fs.  Both of which vary dramatically between component size, manufacture, and temperature!  How can you possibly address all of these variables during the design phase?  By saturating the device, so that all of them get squashed away!

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline TimNJTopic starter

  • Super Contributor
  • ***
  • Posts: 1676
  • Country: us
BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #5 on: July 28, 2015, 05:25:25 pm »
Thanks! Well now there's some more confusion for me. w2aew (I think) said that the transistor should be operated in the linear region as a switch, but Tim you say that it should be saturated. Where is the load in your supposed circuit? Between Vdd and drain?
« Last Edit: July 28, 2015, 05:42:40 pm by TimNJ »
 

Offline w2aew

  • Super Contributor
  • ***
  • Posts: 1780
  • Country: us
  • I usTa cuDnt speL enjinere, noW I aR wuN
    • My YouTube Channel
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #6 on: July 28, 2015, 06:17:48 pm »
Thanks! Well now there's some more confusion for me. w2aew (I think) said that the transistor should be operated in the linear region as a switch, but Tim you say that it should be saturated. Where is the load in your supposed circuit? Between Vdd and drain?

For switch operation, you're not *setting* the Vce or Vds value - you're biasing the input "hard" so that the collector or drain voltage is driven hard towards the emitter / source.  Ideally, Vce or Vds would be ZERO when "on", just like a physical switch.

For a BJT, this type of operation, where the collector is driven low enough to cause the base-collector junction to get forward biased, and the collector voltage is driven down near the emitter voltage, is called the Saturation region.

In a FET, this set of conditions are in the linear region, where the FET's channel looks like a fixed resistor (with respect to Vds variation).
YouTube channel: https://www.youtube.com/w2aew
FAE for Tektronix
Technical Coordinator for the ARRL Northern NJ Section
 

Offline TimNJTopic starter

  • Super Contributor
  • ***
  • Posts: 1676
  • Country: us
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #7 on: July 28, 2015, 09:17:55 pm »
Thanks again. Just thinking about FETs at the moment... Would you say that the voltage produced between drain and source (Vds) is due to its equivalent resistance (Rds) which is dependent on how hard you drive the gate (Vgs)?

The harder you drive the gate, the more current it can pass while maintaining a low Rds-on.
« Last Edit: July 28, 2015, 09:19:48 pm by TimNJ »
 

Offline w2aew

  • Super Contributor
  • ***
  • Posts: 1780
  • Country: us
  • I usTa cuDnt speL enjinere, noW I aR wuN
    • My YouTube Channel
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #8 on: July 28, 2015, 10:08:46 pm »
Thanks again. Just thinking about FETs at the moment... Would you say that the voltage produced between drain and source (Vds) is due to its equivalent resistance (Rds) which is dependent on how hard you drive the gate (Vgs)?

The harder you drive the gate, the more current it can pass while maintaining a low Rds-on.

There is definitely a point of diminishing returns.  The datasheet will usually pretty clearly indicate Rds(on) for a given Vgs.  In general, MOSFETs make better switches than BJTs (lower voltage drop, essentially zero gate current - except for the current required to charge/discharge the gate capacitance).
YouTube channel: https://www.youtube.com/w2aew
FAE for Tektronix
Technical Coordinator for the ARRL Northern NJ Section
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22030
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #9 on: July 28, 2015, 10:12:41 pm »
Not really sure how to take that... "voltage produced" assumes you're applying an external current, which isn't as accurate a measurement / observation method.  If operation slips into the linear range, voltage shoots way up and "Rds(on)" isn't really relevant anymore (physically, the channel is partially pinched off so that the voltage drop is much higher than the resistance of the semiconductor alone).

In the triode region, you can think of Vgs as varying Rds, up to an asymptotic limit of Rds(on) (actually slightly less, since Rds(on) is measured at finite Vgs, but for practical purposes..).  But this is tricky, because it breaks down for Vgs near Vgs(th) (the triode region ends at about Vds = Vgs - Vgs(th)).

In the linear region, Id varies roughly quadratically with Vgs (it's actually exponential below about Vgs(th), in the "subthreshold" region), and the device acts as a transconductance amplifier.  The transconductance doesn't have much of a limit (as far as I know), but you need to go to ever-higher voltages to avoid the resistive region, and eventually the device explodes before you can get any useful power out of it, or anything.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline TimNJTopic starter

  • Super Contributor
  • ***
  • Posts: 1676
  • Country: us
Re: BJTs vs. FETs: Operating Regions (Saturation vs Active)
« Reply #10 on: July 30, 2015, 09:17:45 pm »
Just wanted to say thank you to both of you for your help. Work (my internship) has had me tired out the last day or two. I'll be back at studying up on transistors tonight!
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf