Ok, I made a mistake. I stopped to actually look at the symbol, and that little diode I was talking about in the schematic symbol was not oriented the way I expected.
What I do not see is how this achieves anything, in the first link. Whether full on, full off, or somewhere between, there is no point where current should flow from VUSB to Vbat...
[ok, skip to the *** at the bottom for the short version]
Oh, ok. It looks like if you balance the FET gate just right, you can trickle some current off of the USB rail to directly charge the battery, thus bypassing the overhead on the battery charger? Either way, you're sucking current from USB rail to feed the battery, but this path is more direct, using the FET as a variable resistor? I actually thought these IC's were pretty darn efficient, as is, dropping some linear voltage either method seems like half a dozen of one, 6 of the other.
So if this is your intent, then yeah. Looks simple enough for what (little?) it does. If you don't need it, then use two diodes. I see the Microchip schematic shows a VAC pin. I wonder if there's more going on there than in a simple USB charging IC. Cuz this looks about as screwy as a perpetual motion energy generator. It looks like it would potentially increase the total charge rate/output capability of the charging IC (by reducing heat load on the IC), rather than limit the amount of current available for charging - which is what the app notes suggest.
Ok, ok. there IS more to it. In the Microchip app, you can see the device is plugged into USB power AND an external charger. The external charger and USB rail are both fed into the charger IC, separately. But the charger IC appears (I would presume, for this to make sense) to be supplied by the external charger, alone. (Or the Vusb, alone?).*** Then both external charger 5V and USB rail 5V are rectified together into a new 5V rail. So sucking off this combined 5V rail to feed the battery, directly, reduces the load on the USB chips single input from the USB (or the charger?). And even at that, it's a total hack job.
So this has nothing to do with your initial question. And the first schematic is woefully incomplete to make any sense. By not showing dual supplies, it makes no sense, whatsoever. Just a perpetual motion generator. My guess is the author of the webpage has simply goofed.
This circuit disconnects the battery when USB power is connected, the load will instead use power from USB. This allows the battery to charge normally without any outside disturbances.
Ok, now I know he goofed. This statement (and the red on black schematic) are why I incorrently ASSumed the FET was oriented with the drain on VCC and source on Vbat. (And this is why I don't use FET symbols, because I'm FET-dyslexic). The author has also made the same error. The FET is not being used as a switch between Vbat and Vcc; it's being used as a variable resistor between Vusb and Vbat. There is no way for the FET to "disconnect" the battery from supplying the load. This is achieved automatically by virtue of the Vusb being higher than Vbat. No matter which way you point the FET, the load will always be supplied by USB when available... AND he doesn't see why this circuit is completely stupid, useless, (or dangerous) in this context, no matter which way you point it. Without the need to balance two 5V rails while using a charging IC with dual supply inputs, it looks to be about as useful as a box of rocks.
***Ok, on second thought, I change my mind. Here is my explanation for this. What if perhaps the chip runs off of both the external charger AND USB rail. But they must be fed into the chip separately, to avoid any voltage drop from rectification. So whichever rail is higher is going to be tapped harder. But the higher rail will sag, and once the rails sag to match, they will match on the input end of things. Hence, the chip would ordinarily draw about 50/50 from either source, under high load condition. Now I suppose if the charger is the lower impedance output source, this means that even though the rails match, the charger is supplying most of the current to the combined rail. The more that is tapped on the back end, most of that backend current is coming off the charger. (Inputs are isolated, so same voltage = 50/50. Backend is combined, so lower impedance source delivers more current there) So this means less current that the USB rail (and charger) will deliver to the chip input side. So yeah, this actually works! For a dual supply charging IC where the charger gives more current output than the USB rail, this will reduce the load on the USB rail.
This has nothing to do with charging a li ion battery and running off USB at the same time with a single supply chip. This has nothing to do with reducing available charging current when load is too high. It doesn't limit charging current. It can't. It only reduces the portion supplied by the USB line IF there is also an external charger to draw from. And only if the chip has two isolated supply pins. And only if the external charger has a lower output impedance than the USB rail.