tatus1969 brings up a very good point. Across the profession we have been protecting
I/O pins with Si diodes, but that raises the question, which diode has the lower threshold,
the internal diode we are trying to prevent from drawing current, or the external one we
are using to protect the internal one ?
The sure footed solution is to use schottky diodes, or SiC, as their Vth is inherently lower (picking
the correct part of course).
The latchup mechanism, parasitic SCR, is a little more complicated as not only is there a Vth
to trigger but its sensitive to dV/dT effects. Most modern controllers now state latchup conditions
and the resulting current when latchup occurs. In the past latchup generally was destructive,
resulting in blowing open internal power rail bond wires, or melting silicon in hotspot areas.
Recently some vendors state that latchup, once power is removed, can be recovered from.
Even if latchup does not occur charge injection into pins can result in erratic behavior, as the
charge release into the substrate has no predetermined sink for it, so random logic can be affected.
So consult datasheet.
Regards, Dana.