Author Topic: Q on ESD protection  (Read 518 times)

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Online Jonathon_DoranTopic starter

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Q on ESD protection
« on: June 23, 2024, 10:00:34 pm »
I am designing a small keyboard and am currently thinking about ESD.  Should I have TVS diodes on switches like the bootloader select?  Should I have them on the keymatrix?  If so, can I get away with one per row/column in the matrix?

I also pulled the ferrite bead off of the USB VBUS, figuring that the linear regulator (converts to 3.3V) would probably handle that.

Any recommendations/corrections would be appreciated.  I figure it is better to ask now than later.

Thanks.
 

Offline T3sl4co1l

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Re: Q on ESD protection
« Reply #1 on: June 23, 2024, 10:09:02 pm »
You seem to be referring to components and pins on a schematic; did you forget to attach one?

Tim
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Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #2 on: June 23, 2024, 10:32:59 pm »
Good point.  Sorry about that.  I intended this as more of a theoretical question.  I will attach a schematic when I've completed a bit more.
 

Offline T3sl4co1l

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Re: Q on ESD protection
« Reply #3 on: June 23, 2024, 11:11:38 pm »
Well, I don't know what a "bootloader select" is, so I'll skip that. By "keymatrix" I assume you mean a matrix of keys (possibly with diodes), that's scanned with an MCU or IO expander(s); that depends on what the keys are, how ESD can couple into them, PCB layout, etc.  Ferrite bead, USB, no idea; bad USB connections abound so you might have something wrong there [by accident], and when it comes to supply connections and regulators, standard disclaimers apply:
https://electronics.stackexchange.com/questions/713381/correct-placement-of-series-ferrite-beads-to-avoid-dc-disconnect-during-power-cy/713473#713473

Tim
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Offline VinzC

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Re: Q on ESD protection
« Reply #4 on: June 23, 2024, 11:20:48 pm »
Are you referring to the bootloader selection push button as found on Raspberry Pico boards, for instance? If yes, then you don't need ESD protection, only reasonable pull up/down. At least common usage doesn't show any such requirement or implementation (at least those I've seen).
 
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Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #5 on: June 24, 2024, 01:47:42 am »
Here are a couple of screenshots.  I am in a bit of a hurry, so I went this route.  Hopefully this will make it more clear.

My questions were about the bootloader switch on the main page (below the USB stuff), the J-Link connector on the bottom, and the matrix rows and columns on the next page.
 

Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #6 on: June 24, 2024, 02:13:30 am »
Thanks for the link.  I have not selected all parts yet, but will keep that in mind.  I was not aware of MLCC's dropoff with voltage, and that explains why I see electrolytic everywhere.

I could always go tantalum and celebrate 4-July (US Independence Day) in style.
 

Offline T3sl4co1l

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Re: Q on ESD protection
« Reply #7 on: June 24, 2024, 02:57:03 am »
Ah, OK.  F1 should probably be in front of U1, but it probably never fires even in short-circuit conditions as the USB port is current limited and, IIRC, can't negotiate anything above 500mA (or is it 2A?) with the fixed CC resistors.  And U1 does the job so D1 isn't necessary.

SW1 is a DIP switch style thing? Presumably never meant to be touched by users, or non-technicians anyway. Presumably you know how to handle bare boards with safe ESD practices?

D37-D48 don't do much: the GPIOs are 3.3V supply (mind, probably 5V tolerant; check IO type and spec in datasheet) and the 5V diodes clamp around 10V.  Don't need to use such big diodes either; you could reuse USBLC6 or put in a quad like D1213A-04S-7.  A series resistor say 100 to 1k between TVS and GPIO further reduces peak current into the pin.

You may want EMI filtering on the GPIO outputs, if the board layout is poor (e.g. single sided flex + membrane keys) or the board is large.

If you're not using the ADC, you may still need VCCA wired (check the datasheet) but can likely omit the filtering.  A good reason to leave filtering might be if the onboard PLL (for CPUCLK or USB) needs it.

There are far better regulators than 1117 knockoffs; beware of specified ESR limits, or get one that specifically operates with ceramic capacitors.  Another reason for electrolytic's popularity, but there are other tradeoffs to beware of as well.

Tim
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Offline VinzC

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Re: Q on ESD protection
« Reply #8 on: June 24, 2024, 01:04:55 pm »
I'd also add to what T3sl4co1l wrote the bootloader switch should be a press/push button¹ instead of an inverter (aka SPDT switch). The reason is bouncing. When the button bounces there is a (lot of) phase(s) when the input is left floating and that my trigger spurious events. With a pullup or pulldown, the logic level is always set (read: defined) and the input is never left floating. Another advantage is push buttons are somewhat cheaper than inverters. Same thing if you can enable the internal pull up/down resistor, which makes one component less. At least that's how development boards (I've seen) are implemented.

You can find on the interwebs a couple of articles on hardware debouncing, such as https://www.geeksforgeeks.org/switch-debounce-in-digital-circuits/ .

¹ With a pullup or pulldown resistor.
 
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Offline David Hess

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Re: Q on ESD protection
« Reply #9 on: June 24, 2024, 01:51:57 pm »
Protection should be added to the row and column lines.  The diodes themselves should be tough enough to survive an ESD (electrostatic discharge) event.  I like placing socketed buffers, which could be the I/O expanders, adjacent to the matrix so ESD gets stopped there before damaging something irreplaceable.

One cause of failure is ESD being conducted around the insulation of the keyswitch and hitting a row or column line.  This also happens with exposed LED indicators.  Hardened designs will use spacers or light-pipes on the keyswitches or LEDs to move them further away, or even interpose a conductive shield.

The same sort of protection should be used for hot-plugged signals unless the ground connection can be made first.
« Last Edit: June 24, 2024, 01:53:53 pm by David Hess »
 
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Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #10 on: June 24, 2024, 04:12:00 pm »
Protection should be added to the row and column lines.  The diodes themselves should be tough enough to survive an ESD (electrostatic discharge) event.  I like placing socketed buffers, which could be the I/O expanders, adjacent to the matrix so ESD gets stopped there before damaging something irreplaceable.

Well I have TVS diodes on each row/column (not socketed).  The MCU has protection as well, but I would prefer to stop the ESD before it gets there.
 

Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #11 on: June 24, 2024, 04:28:15 pm »
I'd also add to what T3sl4co1l wrote the bootloader switch should be a press/push button¹ instead of an inverter (aka SPDT switch). The reason is bouncing. When the button bounces there is a (lot of) phase(s) when the input is left floating and that my trigger spurious events. With a pullup or pulldown, the logic level is always set (read: defined) and the input is never left floating.

I certainly don't want anything floating.  But I don't think it is too much to ask that the bootloader be selected before power-on (as there is no reset button).  I could always add a pull-up resistor next to the current limiting resistor, R3. (I do not believe that BOOT0 has an internal pull-up and even if it did it might not be active during boot).

Push buttons bounce too.
 

Online Jonathon_DoranTopic starter

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Re: Q on ESD protection
« Reply #12 on: June 24, 2024, 05:00:14 pm »
Ah, OK.  F1 should probably be in front of U1, but it probably never fires even in short-circuit conditions as the USB port is current limited and, IIRC, can't negotiate anything above 500mA (or is it 2A?) with the fixed CC resistors.  And U1 does the job so D1 isn't necessary.

SW1 is a DIP switch style thing? Presumably never meant to be touched by users, or non-technicians anyway. Presumably you know how to handle bare boards with safe ESD practices?

D37-D48 don't do much: the GPIOs are 3.3V supply (mind, probably 5V tolerant; check IO type and spec in datasheet) and the 5V diodes clamp around 10V.  Don't need to use such big diodes either; you could reuse USBLC6 or put in a quad like D1213A-04S-7.  A series resistor say 100 to 1k between TVS and GPIO further reduces peak current into the pin.

You may want EMI filtering on the GPIO outputs, if the board layout is poor (e.g. single sided flex + membrane keys) or the board is large.

If you're not using the ADC, you may still need VCCA wired (check the datasheet) but can likely omit the filtering.  A good reason to leave filtering might be if the onboard PLL (for CPUCLK or USB) needs it.

There are far better regulators than 1117 knockoffs; beware of specified ESR limits, or get one that specifically operates with ceramic capacitors.  Another reason for electrolytic's popularity, but there are other tradeoffs to beware of as well.

Tim

Thanks Tim!  Lots of good stuff here.  I debated the placement of F1 quite a bit, but got it wrong.  ESD/EMI is a very weak area for me, but I try to understand what is going on rather than just copying folks.

I see that I overlooked the USBLC6's protection of VBUS.  That is one less part to worry about.

I am humbled that I forgot the resistors on those GPIOs.  And that D1213A-04S-7 looks like a good match.

It may be crazy, but I'm thinking of taking this to 4 layers.  The cost difference is minimal, and it will save me some trouble routing.  I'm hoping that will take care of any issues the GPIOs would have.

I'm pretty sure that I need VCCA wired.  You're right that there is no reason for splitting it off from +3.3V and adding the additional filtering.  At the time I was still undecided if I was going to use any analog functions of the MCU.  It is not unusual for similar keyboards to have joysticks or potentiometers.  So I put the filtering in.  I should take it back out until I have a need for it.

Regarding the regulator, the 1117 is a $0.13 jellybean part.  I could go with something like the TPS7A47 but that seems overkill.
Edit:  OK, I am starting to get it.  That 1117 was cheap, but I would need tantalum caps at $2 each for that thing.  The TPS7A47 will cost me $2 but use ceramic caps.
« Last Edit: June 24, 2024, 05:35:26 pm by Jonathon_Doran »
 

Offline David Hess

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Re: Q on ESD protection
« Reply #13 on: June 24, 2024, 06:02:50 pm »
Protection should be added to the row and column lines.  The diodes themselves should be tough enough to survive an ESD (electrostatic discharge) event.  I like placing socketed buffers, which could be the I/O expanders, adjacent to the matrix so ESD gets stopped there before damaging something irreplaceable.

Well I have TVS diodes on each row/column (not socketed).  The MCU has protection as well, but I would prefer to stop the ESD before it gets there.

That should be enough.  There are all kinds of ways to do it.  Another way I have seen ESD protection implemented is to use discrete transistors as buffers because they are much tougher than IC inputs and outputs.

I would *not* rely on the ESD protection of an IC unless that is an explicit function of the IC, like for an external interface IC.  Almost all ESD protection for ICs is about protection during assembly.
 

Offline T3sl4co1l

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Re: Q on ESD protection
« Reply #14 on: June 24, 2024, 08:07:19 pm »
The idea would be, use buffers/drivers as sacrificial, so something more important doesn't get zapped.  Maybe you're working with a vintage part, or a large logic card you don't want to fry, etc., and exposing a commodity part to errant fingers is safer than risking those.

STM32F1 is hardly precious, and could well be used by itself; it might not last long (years?) that way, or suffer from latchup and need to be re-plugged after struck, but I mean, you're writing the source code and can replace and reprogram it at any time.  Probably not a worthwhile compromise here, but sometimes it is, and it's worth knowing the potential consequences.

Some basic clamp diodes (with integrated TVS as these have, or plain diodes and a nearby bypass cap) and series resistor will most likely extend that to decades of stable use.  (Do mind to filter and debounce the readings, don't want a random noise blip to register errant keystrokes.)

On a related note, I once zapped a bare FPGA doing keypad duty (similar sort of application, but configurable-hardware based) at full strength for dozens of hits, and it didn't even latch up (or, if it did, the circuit rebounded immediately?).  It was only rated 1kV ESD I think, or maybe even less?  That's the kind of magnitude you start to wonder about, but also it's the kind of thing that can induce latent damage -- partially vaporized traces, unstable junctions; atomic diffusion over time, and migration under electric field or current flow, can cause spooky behavior, after which maybe the chip doesn't work at all, maybe it's (apparently) healed by soldering temperature, maybe it's discarded as broken then sat on a shelf for ten years then eventually someone picks it up and checks it and it's good as new; you never know.


That should be enough.  There are all kinds of ways to do it.  Another way I have seen ESD protection implemented is to use discrete transistors as buffers because they are much tougher than IC inputs and outputs.

I would *not* rely on the ESD protection of an IC unless that is an explicit function of the IC, like for an external interface IC.  Almost all ESD protection for ICs is about protection during assembly.

Not much reason to use transistors here of course, but if it were something like an LED matrix, the current boost for column drivers is a welcome addition, and maybe GPIOs could sink the rows as-is (via current limiting resistor).

Incidentally, transistor arrays/packs are expensive; don't use them.  Quads anyway.  Duals are cheap and plentiful though.  Or more specialized ones, like the ULN series drivers, assuming you need such functionality.

Default ESD ratings are specified in JESD-something (a coincidence, they're a family of EIA/JEDEC standards), 1kV HBM I think, which is acceptable for assembly work on an ESD-protected bench.  With simple ESD controls in place, maximum discharge usually tops out in the 300V range, IIRC.

What's scary is I've seen many devices that just don't specify ESD at all; some manufacturers do specify it elsewhere (quality documents), but many don't even do that.  Am I to assume they've followed the (proprietary, non-publicly-available) industry standard, without even having made reference to it?  One vendor I actually called up, they had to reach the design engineer to affirm yes, they did.  In general, who knows.

Tim
« Last Edit: June 24, 2024, 08:23:01 pm by T3sl4co1l »
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Offline VinzC

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Re: Q on ESD protection
« Reply #15 on: June 25, 2024, 10:23:31 am »
I certainly don't want anything floating.  But I don't think it is too much to ask that the bootloader be selected before power-on (as there is no reset button).  I could always add a pull-up resistor next to the current limiting resistor, R3. (I do not believe that BOOT0 has an internal pull-up and even if it did it might not be active during boot).

Push buttons bounce too.
Yup, all mechanical contacts do bounce. It's only a matter of complexity vs functionality. In that regard a push button and a pullup is the cheapest (both in price and complexity) bare minimum. Most probably not a surprise it's how this functionality is implemented on boards that demand it.
« Last Edit: June 25, 2024, 10:26:14 am by VinzC »
 


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