I did read where you said, "I don't know what the high-level threshold for the EN pin is supposed to be, but that obviously isn't enough."
and I pulled the published formula from a document I use all the time that does tell you.
My implied meaning behind that statement was that I don't know because it's
not documented. Espressif only document the V
il(nRST) threshold for the EN pin; they do not document a high threshold. The general V
ih/V
il obviously do not apply to the EN pin, as it's low threshold differs from the general one (0.6V absolute vs. ~0.8V for 3.3V VDD).
Look, I don't mean to be an arsehole here, but I'm going to say it bluntly:
literally nothing in your original post was helpful given the context, and had all the hallmarks of someone who read the thread title and nothing else. Let me dissect by paragraph:
generally, espressif en pin is
High: On; enables the chip
Low: Off; the chip powers off
Note: Do not leave the pin floating.
Telling me how the EN pin works at such a basic, basic level is pointless. Obviously I know this, otherwise I would never have even got to the fundamental point of having a running ESP32 board.
VIH High-level input voltage 0.75 × VDD1 — VDD1+ 0.3 V
VIL Low-level input voltage –0.3 — 0.25 × VDD1 V
See my point above regarding assuming the specified behaviour of general GPIO pins actually applies to the EN pin. And even telling me that the logic high threshold
may be 0.75*3.3=2.475V doesn't help, because it's blindingly obvious that whatever logic high threshold voltage is in play is greater than what I was getting. It's not like I was making the EN voltage 1.4V on purpose, thinking the logic threshold was something different. So more redundant information.
To ensure that the power supply to the ESP32 chip is stable during power-up, it is advised to add an RC
delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and C =
1 µF. However, specific parameters should be adjusted based on the power-up timing of the module and
the power-up and reset sequence timing of the chip. For ESP32’s power-up and reset sequence timing
diagram, please refer to Section Power Scheme in ESP32 Series Datasheet.
Again, redundant information. You just quoted a section of the documentation that recommends doing exactly what I had
already stated I have in place - to wit: "on the EN line of the ESP32 board I have the recommended 10k pull-up and 1uF decoupling/delay capacitor".
I'm sorry if you took offence, but it really bugs me sometimes when forum posters just dive in with generic replies like "Oh, you got a problem with X? You wanna be doing Y and Z" without actually taking in the details of the situation or applying any critical thinking.