Power Consumption of CMOS Inverter Amplifier

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Hi everyone,

I'm trying to understand the power consumption of two different CMOS amplifiers (Amp 1 and Amp 2).

Amp 1 consists of 6 individual amplifiers where they are sized to have varying transconductances, g_m 1 to 3 as shown in the picture. Amp 2 consists of a single amplifier where it's sized such that the total transconductance equals the sum of all 6 individual amplifiers from Amp 1. Both amps are biased at saturation with mid voltage set to 0.5 V. Each amp is configured as an inverter with PMOS and NMOS. Both PMOS and NMOS are set with minimum width with varying number of fingers such that the gain is shifted to the mid point voltage of 0.5 V.

In the simulation results, I'm seeing that the total power consumption of Amp 1 is always twice as much as Amp 2 and I'm wondering why this is the case. My thought process was that since the bias points are the same and the total width of Amp 1 combined equals total width of Amp 2 for both PMOS and NMOS, they should have the same power consumption.

Thank you for your help!