PCB Design strategy and routing topology

[alireza7]

hi
my question is general but suppose you want to start designing a PCB including a regulator(LDO and Switching) a microcontroller , a GSM Module , some I/O like RS485 , LCD , EEPROM , ....
we assume that schematic is ready and we want to design PCB.

as for me i follow this strategy:

1.define rules.

2. component placement :
i do this base on signal flow in schematic to get best and shortest connections , at this step i do not consider power connections i jest pay attention to the signal connections.

3.route power traces:
at this step i route power signals with star topology and distribute it among my pcb modules and components.

3.route signal traces:
i first route high speed and important signal traces like USB Diffpaires , RF traces , ... and do impedance matching and length matching
then i  route other signals like uart , led , gpio , .... . also i assign or update  io's of my micro controller in my schematic in this step in order to get better arrangement

what is your strategy ?do you see any problem in my strategy? 
please consider that the pcb should pass EMI and EMC and other environmental tests
any thing that improve PCB Design skill will be appreciated.

[Richard Crowley]

You might want to alter that sequence for critical RF design.
I found this video very interesting.....

https://youtu.be/TnRn3Kn_aXg

[alireza7]

at first i decide to route  micro controller part of my circuit
i read some pcb design guide lines on the net and designed my own pcb which consist of a stm32f and some other basic parts like a jtag connector and crystal , ...

can you please take a look at it and tell me if there is any problem or considerations?

I am worried about crystal part and power routing topology  .

also is it ok to have via under the micro controller?

my schematic:

top with vcc high light :

bottom with vcc high light :

closer look at oscillator part:

[alireza7]

also i am worried about placement of bypass capacitor (c10 c17 c9 c16) of crystals. should i place these capacitor between crystal and MCU or i should put them behind crystals?

what about placement of decoupling capacitors ( c2 c3 ,... , c8 ) around the MCU? are they well placed and well powered?

[paulca]

30 seconds looking at that layout and I'm dizzy with stars in my eyes!  The high contrast colour schema is foul!  There are tracks that don't appear to go anywhere, pads are impossible to see.

I'm sure that's not your fault, but what software is that so I can avoid it?

[djnz]

I'm sure that's not your fault, but what software is that so I can avoid it?

That looks a lot like Protel 99. It never bothered me when I used to use it, but it does seem a little unsettling right now!

[soFPG]

This is Altium Designer 18

[alireza7]

There are tracks that don't appear to go anywhere

it's just an example of how i should route I/Os of my micro , and in this PCB my intent was just MCU not it's peripherals , so IO traces are left halfway