Odd? I can see the common signal (mid) fine with two sines of he same frequency. The diff (side) also seems to work as expected.
The only case that is not correct is when one L/R input is 0v. Then the summer simply passes the other channel's signal.
I would think that that is not common to both L+R...
So perhaps I need to subtract the side from the sum output to get the real common part between L+R...?
EDIT: attached my LTSpice file.
Only your expectations are wrong, the circuit is working fine. You're just getting confused by the word "common". If you feed a signal into L, and nothing into R, you should see the signal at half strength in both the mid and side outputs. Why? Because the mid and side outputs are defined as two signals with which you can reconstruct the original as follows:
L = mid + side
R = mid - side (note, which one is negative is arbitrary, so don't be too fussed if L seems to be mixed up with R)
So, I just claimed that a half-strength signal in both mid and side will lead to a signal in the left channel, and zero in the right channel.
L = x/2 + x/2 = x <--- signal reconstructed perfectly in left channel
R = x/2 - x/2 = 0 <--- absence of signal reconstructed perfectly in right channel
So, your circuit's output is correct, and is the only correct output. Put it another way: you seem to be suggesting that the common/mid output should be zero, and the side output should show the signal in the one channel. But then how on earth can you tell the difference between the left and right channel being zeroed?