MOSFET linear regulator circuit

[Zero999]

The transient analysis clearly shows your circuit oscillates.

It's not surprising that circuit oscillates. It uses the OP37 which is not unity gain stable.

Before trying anything else, try changing the op-amp to something which is unity gain stable, such as the OP27.

[void_error]

Or try something with rail-to-rail inputs and output so there's no worry about input voltage range or output voltage swing. LT has a few parts that go up to 36V supply which are reasonably fast like the LT1630 or LT1678 which have around 150uV offset.

[VEGETA]

Well, I tried different op-amps and there was some difference in performance indeed. Originally I wanted to pick a cheap one like lm358 and use it for all the design because a good op-amp will be around let's say 5$ or maybe 3$.

I've seen the EEZ-Supply design using an NPN transistor to switch the mosfet which I tried in my earlier circuits (and it ended oscillations at the time) but I could not understand why they put a reverse-biased diode (BAS316) in the output of both CV op-amp and CC op-amp like the image here:




and they are using a 2.2k resistor from the output of the regulator directly to the gate which made me think it has to do with oscillation but I really couldn't figure out why (maybe I am wrong). The circuit after these 2 op-amps reaching the npn is not understandable to me.

However, their voltage and current setting and monitoring is almost like mine... so I guess my problem is I don't have what they put after the op-amps and before the npn transistor plus what is there near the mosfet itself.

Is this correct?

[void_error]

FYI the LM358 is not that good but it will work for a really cheap power supply.

I assume you are referring to D15 & D17.
But let's start with R32 first. It's used to help the Q4 turn off by discharging the gate-source capacitance.

The CV & CC loops are OR'ed together which means that if of IC6A or IC7A reach their set limit - voltage or current - their outputs will become lower and turn on (actually increase the current through) Q12 which will divert current from the base of Q7 and therefore reducing the gate-source voltage of Q4. Q12 also works as a level shifter. The diodes are there to prevent current flow between the outputs of IC6A & IC7A.

This circuit is probably a bit too complicated for your knowledge level so I think I'll draw something simpler in LTspice which works using the same principles, simulate it and post it here. I'll try to keep it as simple as possible with both CV and CC loops.

[Kleinstein]

The EEZ-Supply circuit is rather complicated for several reasons:
1) It uses separate sense inputs
2) It uses an output stage with extra voltage gain
3) It uses an MOSFET as a source follower (like the initial suggestion) - these are difficult to drive and more nonlinear at low currents

For the beginning it would be easier to use BJTs (e.g. NPN Darlington).

An important factor is also the voltage range, as this decides if the OPs voltage swing is sufficient.

[Zero999]

I don't see the need to use MOSFETs in this case. A BJT should be capable of providing a dropout voltage of 1V if the base drive voltage is higher than the output.

[VEGETA]

FYI the LM358 is not that good but it will work for a really cheap power supply.

I assume you are referring to D15 & D17.
But let's start with R32 first. It's used to help the Q4 turn off by discharging the gate-source capacitance.

The CV & CC loops are OR'ed together which means that if of IC6A or IC7A reach their set limit - voltage or current - their outputs will become lower and turn on (actually increase the current through) Q12 which will divert current from the base of Q7 and therefore reducing the gate-source voltage of Q4. Q12 also works as a level shifter. The diodes are there to prevent current flow between the outputs of IC6A & IC7A.

This circuit is probably a bit too complicated for your knowledge level so I think I'll draw something simpler in LTspice which works using the same principles, simulate it and post it here. I'll try to keep it as simple as possible with both CV and CC loops.

Ok I am waiting your circuit simulation, GREAT! I want to learn not just get something ready. If you know an online book or something good as a source to learn these stuff.

I get the idea of Dave's circuit and this eez supply is the same too but these additions are different. I did the same as dave's one but it didn't work.

looking forward to your help. thanks.

[void_error]

Did a quick google search for "linear regulator handbook" and it came up with these results:
http://microblog.routed.net/wp-content/uploads/2007/10/hb206-d.pdf
http://www.ti.com/lit/an/snva558/snva558.pdf
http://www.smcelectronics.com/DOWNLOADS/1980-VOLTREG.PDF

[VEGETA]

I will read them soon just like the previous one, also other stuff that I found. Waiting for your spice simulation.

thanks always.

[VEGETA]

I am waiting your circuit simulation that you promised xD. I am reading more stuff now but I still need a basic design to cut my way through.

I already made my decision about pre-regulator which will be a SEPIC one. I still have to figure out how to protect the 2 18650 batteries because I have an idea of making a protect each single cell alone then put them in series.

[void_error]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

[not1xor1]

Here's how you do an AC analysis:



V(out)/V(fb) is the response of the whole regulation loop.
V(g)/V(fb) is the response of the op amp
V(out)/V(g) is the response of the power stage, the MOSFET in this case

I've also attacked the LTspice .asc files for convenience.

The transient analysis clearly shows your circuit oscillates. To find out why it oscillates and how you can you fix that read the pdf I linked here.

Hi
I've installed ltspice just a couple of days ago
When I plot the frequency/phase response of a circuit both lines are plotted in the same colour/style, while in the image you attached the phase response is drawn in dashed-line style.
I was not able to find any option for that purpose,
pls, might you explain how did you get that nice dashed line?

thanks

[void_error]

Right click on the plot and choose reset colors, that might help.

[not1xor1]

Right click on the plot and choose reset colors, that might help.

I think the dashed line depends on the AC simulation point-per-decade parameter
when I set it to 10 points the dashes magically appear
anyway thanks

[VEGETA]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

well, it gives me errors because ltspice doesn't have models for some parts. If you can, please upload them too. Plus, you used an npn here, can it be safely replaced by an nmosfet (gate drive is separate 30v rail)?

I guess Q1 and Q2 are for gate drive or is it what you call (compensation network)? originally I wanted to get separate rail for nmos gate drive which is controlled by an op-amp. However, here you used the same method like EEZ supply, which is 2 reverse-biased diodes in front of the cc and cv op-amp. I wonder why it cannot be straightforward like dave's circuit. And SURELY I must get another op-amp than the expensive lt1678 ^__^.

Here is what I think:

R18 is the load itself, while the 0.1ohm R11 is a shunt resistor for current sensing (can be before the regulator itself i guess). U1+U2 for CV while U3+U4 for CC. I couldn't understand the purpose of C1+R5 (and their counter parts for CC).

When Vmonitor > Vset, U1 is low (0v) which pulls the base of the transistor low. I didn't understand the purpose of Q1+Q2 in this loop, but if they are for gate drive, it is different. Because I want a true 1v dropout so the input might be like 2v for 1v output, perhaps this will cause issues.

You are doing low-side current sensing over the 0.1R, which is simpler than high-side one in terms of op-amp usage. I guess it is x10 gain and when Imon voltage is > Iset voltage, U3 will be 0v pulling the base of the transistor to ground.

[Kleinstein]

You can get away with an even simpler version: the left most OP is not really needed.

For a cheap version the LM324/LM358 is ok for the OPs. It helps if the OPs are single supply.

C1 and R5 set the loop gain for the regulator, so there is a chance to make it stable and not oscillating. Finding the right values for these two is a major part in designing the PSU.

The current limiting is rather slow in this type of circuit - so an extra, fast current limit might be needed to survive a sudden short.

Using a MOSFET instead of the NPN output stage has two main disadvantages:
1) MOSFETs are quite slow and nonlinear at low currents. So performance would be not that good and more output capacitance is needed.
2) One needs a gate voltage that is considerably (e.g. 3-5 V) higher - so either an even larger dropout or an extra higher supply is needed. One also needs protection for the gate, if not included in the MOSFETs.

So there is not a big incentive to use a MOSFET instead of a BJT.

If you really want a MOSFET output element, I would suggest a different topology with a floating regulator and auxiliary supply. There was a thread about such a circuit (though higher voltage - but that circuit type is very flexible) about 1 week ago. https://www.eevblog.com/forum/projects/power-supply-topology-will-it-work-(control-theory-stability)/

[void_error]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

well, it gives me errors because ltspice doesn't have models for some parts. If you can, please upload them too. Plus, you used an npn here, can it be safely replaced by an nmosfet (gate drive is separate 30v rail)?

Right-click on the transistor and pick a new one. For Q1 & Q2 2N3906 would do, 2N3904 for Q4 and some power transistor for Q3 with Ic > 3A. I don't actually know which of the BJTs are in the standard LTspice libraries but if it makes it easier to download them here's a link http://ltwiki.org/?title=Components_Library_and_Circuits.

I guess Q1 and Q2 are for gate drive or is it what you call (compensation network)?

Q1 & Q2 along with R1 & R2 for a current source.

originally I wanted to get separate rail for nmos gate drive which is controlled by an op-amp. However, here you used the same method like EEZ supply, which is 2 reverse-biased diodes in front of the cc and cv op-amp. I wonder why it cannot be straightforward like dave's circuit. And SURELY I must get another op-amp than the expensive lt1678 ^__^.

The diodes are actually forward-biased while one of the CV/CC loops is active because the U1 & U3 are in an inverting configuration.
In other words when the output voltage increases the output of U1 goes closer to ground, pulling the base of Q4 lower, keeping the output voltage at a fixed value.

Here is what I think:

R18 is the load itself, while the 0.1ohm R11 is a shunt resistor for current sensing (can be before the regulator itself i guess). U1+U2 for CV while U3+U4 for CC. I couldn't understand the purpose of C1+R5 (and their counter parts for CC).

You got that right.
C1 & R5 are used to slow down the op amp so it doesn't oscillate, this would be the simplest description. They should be explained in the PDFs I linked earlier.

When Vmonitor > Vset, U1 is low (0v) which pulls the base of the transistor low. I didn't understand the purpose of Q1+Q2 in this loop, but if they are for gate drive, it is different. Because I want a true 1v dropout so the input might be like 2v for 1v output, perhaps this will cause issues.

You are doing low-side current sensing over the 0.1R, which is simpler than high-side one in terms of op-amp usage. I guess it is x10 gain and when Imon voltage is > Iset voltage, U3 will be 0v pulling the base of the transistor to ground.

With this circuit the dropout will be just under 3V while in regulation. If you want lower dropout you need another supply on top of +V, call it a bias supply, at least 3V higher than the output voltage. Connect the collector of Q3 to +V and Q1 emitter, R2 & Q4 collector to the bias supply.

You can get away with an even simpler version: the left most OP is not really needed.

Oops, that's a leftover from the circuit I modified (actually simplified), and yes, it can be left out for simulation purposes.

For a cheap version the LM324/LM358 is ok for the OPs. It helps if the OPs are single supply.

Yup, they'd work fine, but their offset voltage is not quite so low so the value of the current sense resistor should be increased so the voltage drop on it increases so offset voltage won't affect the accuracy. They're also slower than the LT1678 so the loop gain should be changed and they're not rail-to-rail input or output so care should be taken with its input voltage, it should be at least 2V below the supply, it's in the datasheet.

The current limiting is rather slow in this type of circuit - so an extra, fast current limit might be needed to survive a sudden short.

Left out for the sake of simplicity.

Using a MOSFET instead of the NPN output stage has two main disadvantages:
1) MOSFETs are quite slow and nonlinear at low currents. So performance would be not that good and more output capacitance is needed.
2) One needs a gate voltage that is considerably (e.g. 3-5 V) higher - so either an even larger dropout or an extra higher supply is needed. One also needs protection for the gate, if not included in the MOSFETs.

So there is not a big incentive to use a MOSFET instead of a BJT.

With a BJT as a pass element a low dropout voltage can still be achieved, around 1V, if the base of the darlington pair can be pulled above the supply voltage. In this case the minimum dropout would be around 4*0.7V which is the sum of voltage drops across the current source and the darlington pair or even less if the transistor in the current source is allowed to saturate.

[Zero999]

Right click on the plot and choose reset colors, that might help.

A bit off topic but I always find the default LTSpice palate makes plots difficult to read. Changing to a white background can help but light green can still be difficult to see. I prefer a black background with the dark colours changed to pastel shades: much easier to read.

[VEGETA]

I couldn't download your library files. but I choose the parts you described here. The problem is that most parts doesn't start the simulation, or actually it starts but never shows the plots while keep saying stuff in the status bar with "press ESC to quit). What happens?

The 1v max dropout is a must for me, actually I thought of going lower if I could. Here is what I want to achieve:

- 0-20v\0-2A supply with nice efficiency.

- power source is 2 18650 batteries! yes you read that! with the availability to connect a high power usb wall adapter (2A) for charging and sharing current.

- a good pre-regulator (SEPIC one) to keep voltage 1v above output... software controlled via a digital POT. I actually had a working simulation for it.

- nice software control like making 2v dropout when you change the voltage, then after say 2 seconds it makes it 1v (when the circuit and load are pretty stable)... so software adjusts this to keep efficiency high while dealing with dynamic loads properly.

- The main regulator is linear and it is an NMOSFET one, I will have a separate supply for the gate and the op-amps which is a little boost converter to 30v, so higher gate voltage is not a problem and no need for extra protection since the max output voltage is 20 so 30-20v = 10v which is good. Now if I choose 5v output, will it feed 30v or less (assuming npn driven by the cv cc opamps).

So the whole problem is with the linear supply part, the rest is manageable to some extent. LTSPICE is not cooperating with me here xD.

I am going to post a new circuit with an N-MOSFET soon... it worked but still not really precise when current limit works. Even voltage when I put it to 5v it outputs something like 5.01 which is pretty great!

stay tuned xD

[VEGETA]

Here is my circuit (Attached too):



I don't know if this is stable enough or accurate enough, I just saw it is not very accurate. I put a value of 1A and I get 0.999, this is so accurate really but I like to see the "1.xxx" thing

I intend to make this supply 0-20v,0-2A so a value of 2v should always be available at the op-amp but this will make it not accurate when applying 20v... so, the Vref I am gonna use is 2.048v and then I will feed the voltage op-amp with 0-2v only, not full 2.048v so that current op-amp set voltage is always higher... this is to ensure CC is always off unless you want it to.

I choose that mosfet (BSC010NE2LS) because of low Ron and low price. I need a similar one for the SEPIC pre-regulator which must be a fast mosfet. this one happens to suite both! The IRFP250N is more expensive but it offers 200v Vds which is not needed here as drop voltage will always be 1v or a little more. what do you think about that?

I made the R5=1ohm rather than 0... I wonder why it was 0? also changed the diff-amp resistor to 1k,10k because I intend to use these values a lot.

what do you think about the circuit so far? is it complete or need something else like output caps?

[salbayeng]

OK you seem to have all the bits there,  but

I intend to make this supply 0-20v,0-2A so a value of 2v should always be available at the op-amp but this will make it not accurate when applying 20v... so, the Vref I am gonna use is 2.048v and then I will feed the voltage op-amp with 0-2v only, not full 2.048v so that current op-amp set voltage is always higher... this is to ensure CC is always off unless you want it to.

this makes no sense? Each of these references will have a pot across it, and most of the time the CC pot will be set quite low.  CC or CV operation is determined by what is on the negative inputs of U3 and U1 compared to the references, the actual numerical voltage on the positive imputs doesn't matter. (The LT1678 is happy working at the negative rail?). And in reality you would just use the same reference, being able to get to 20.48v is not a drawback.

I choose that mosfet (BSC010NE2LS) because of low Ron and low price. I need a similar one for the SEPIC pre-regulator which must be a fast mosfet. this one happens to suite both! The IRFP250N is more expensive but it offers 200v Vds which is not needed here as drop voltage will always be 1v or a little more. what do you think about that?

when running in linear mode, the Rds is generally not important, but MOSFETs with higher Rds are preferred as this means the capacitance will be lower, higher voltage MOSFETS generally have higher RDS and lower capacitance, and so are generally a good choice, higher voltage devices generally have a higher threshold voltage (unhelpful) and a higher gate withstand voltage (helpful) , in your circuit you could potentially put 30v to the gate which would kill most mosfets, you should put a 10-15v zener somewhere,  eg from G-S on M1. Ideally there should be ~ 20ohm in series with the zener to prevent VHF oscillation of MI, or maybe just put a ferrite bead directly at the gate.

[/quote]

I made the R5=1ohm rather than 0... I wonder why it was 0? also changed the diff-amp resistor to 1k,10k because I intend to use these values a lot.

R5=1ohm is functionally the same as zero,  people just put these in simulators to remind themselves where they might want to fiddle with compensation.
Note also that under an output short circuit your CC loop gain will be quite high (about a 100x the CV loop)  try setting R18 to zero and check for stability, you might need to pad across R14 with a series R and C to stabilise the loop, it will also make the circuit less responsive to brief load transients. RC maybe around 1mS.

what do you think about the circuit so far? is it complete or need something else like output caps?

Bulk capacitors will probably be needed, look at where your closed loop response rolls off, if (for example) it rolls off at 1kHz,  then the capacitors need to be able to supply full load current for a bit less than a ms, figure out an acceptable droop , say 100mV,  then use I=C.dV/Dt to work out C.  for 2A , 100mV and 1mS this is 10,000uF.  That's a bit big as it will blow stuff up before CC takes over!, If possible you should aim for ~ 10uF to 470uF as output caps, so will need to get closed loop gain to 10kHz or better.  If you can't get the roll-off you will just have to tolerate a worse transient response.
Note that the ESR of your bulk capacitor affects loop stability (more is better). Also test your design in the case where a user jams a huge capacitor across the terminals ( I use 100,000uF for "bulletproof" testing)

[void_error]

Simulating a steady state condition tells you nothing about how it will perform under a variable load. Attached is an example of how you could do that.
Another issue is when you short the output as the MOSFET will see a gate-source voltage of nearly 30V for a brief period before the CC loop has the chance to react, which will kill it.

Bulk capacitors will probably be needed, look at where your closed loop response rolls off, if (for example) it rolls off at 1kHz,  then the capacitors need to be able to supply full load current for a bit less than a ms, figure out an acceptable droop , say 100mV,  then use I=C.dV/Dt to work out C.  for 2A , 100mV and 1mS this is 10,000uF.  That's a bit big as it will blow stuff up before CC takes over!, If possible you should aim for ~ 10uF to 470uF as output caps, so will need to get closed loop gain to 10kHz or better.  If you can't get the roll-off you will just have to tolerate a worse transient response.
Note that the ESR of your bulk capacitor affects loop stability (more is better). Also test your design in the case where a user jams a huge capacitor across the terminals ( I use 100,000uF for "bulletproof" testing)

The ESR of the capacitors indeed plays a big part in the response of the psu, with the ideal value of zero it looks like it will work just fine, worse results are to be expected with real capacitors.

[Kleinstein]

I have not simulated the last circuit (only the last BJT based Version), but I have some doubt it will be stable as shown. Even the BJT only version tends to oscillate at some currents and MOSFETs are rather nonlinear and thus behave more different at low and high currents. So it is even more difficult to get it stable for all currents. In general the circuit with the difference amplifier at the input can be tricky, as tolerances in the resistors could make the output resistance negative at low frequency and the circuit thus unstable with certain loads.

The BSC010NE2LS is one of the few modern FETs where they have a good (trustworthy) SOA in the DS  . However this SOA curve also shows that at this FET is not suitable for linear operation: at a 20 V DS voltage it is only specified to about 150 mA. The rather hard to cool case is also not good. This is not a surprise as it is a modern fast low voltage type.

To have a chance to get a reasonable power handling capability one should look more for old higher voltage (e.g. >=200 V) types. So a BUZ11, IRF640 or IRFP250 would be more suitable candidates.

[salbayeng]

There's another design feature I just noticed around Q4 2N3904.
If the load is connected to a battery (or a big capacitor) or maybe a load that just cycles on and off,  and you lower the setpoint, the base will get dragged to ground while the emitter is temporarily held up by the capacitance of the MOSFET (or by a zener diode I suggested earlier).
Then you will activate the internal parasitic zener in the 2N3904,  the current will be limited by the available drive of the LT1678.  Datasheets suggest it's a 6v zener? (Usually around 7v for a BJT),  If the LT1678 only sinks 30mA then it's 7x30 = 210mW in the zener so it's not going to be a problem. The LT1678 will get a bit warmer with ~ 400mW worst case , but survivable.

[VEGETA]

Here is the new modification:




New stuff as you suggested:

- changed the mosfet to BSZ100N06LS3 which is better and cheaper for this linear design as well as the switching pre-regulator.
- modified the filtering on both cv and cc op-amps.
- added a 20v zener between the gate and the source (output).

Now it is better for sure but it still get a spark when voltage changes from 0v to bigger number. It gives a spark of around 10A for the required 2A CC... However, it is > 0.5ms oscillation.

If you check it out, it is better than my explanation.