MOSFET linear regulator circuit

[VEGETA]

Hello,

I want to make a linear lab supply that is using a MOSFET (no LT3081 or any similar) which should have a switching pre-regulator before it to make the voltage 1v more in the input at all times to have more efficiency.

here is my schematic:




this circuit simulated perfectly in LTSPICE but without loads, when I put any load it goes down to few mV or output!! is there anything wrong with it or the ltspice is wrong here?

I will feed the gate drive with an external voltage so I won't take it from the input because I want a 1V drop and then I won't be able to feed the gate with necessary voltage.

looking forward to your help.

thanks

[salbayeng]

What is the "NMOS" transistor? Try using a real part number from the model library.

Something with part numbers like ...15N05     i.e.  <some letters> ,15A , NMOS, 050volts

You might have some default transistor, with a huge on resistance, or a huge threshold voltage.

[ZeTeX]

Use something like IRFZ44N for testing, never trust ltspice ideal models.

[VEGETA]

so you think the circuit will work on real world? assuming I will use a decent one with small Rdson.

[Kleinstein]

It could work work with a well behaved load (e.g. resistor) and if the gate capacitance of the MOSFET is no too large.  A more complete circuit should include at least an resistor in the gate line.

It gets more complicated if the regulator should be used for highly variable loads.

[Zero999]

Yes, it should work in real life. The default MOSFET model in LTSpice is the small signal type, with a high on resistance. Change it to something more practical,

I suppose a MOSFET with a huge gate capacitance could be a problem for the op-amp to drive but it won't be as bad as the MOSFET's datasheet suggests, as it's configured as a source follower, the capacitance will be greatly reduced by negative feedback.

[VEGETA]

I tried a famous mosfet and it worked... only if i choose the op-amp LT1491 not the generic model. the circuit is in the attachments.

My only concern is that whether this circuit will work for 1v dropout or not. can you recommend a mosfet for this? or maybe what is the aspect i should look for?

[Zero999]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

[VEGETA]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

Here is the new circuit:



I will choose proper parts if the circuit works well, but now let me understand some stuff first. Like the minimum voltage required for the mosfet to work?

That mosfet has Vgs_threshold of 2 to 4v so does that mean minimum voltage drop between input and output can be as low as 1v, but the minimum required gate voltage is around 2v-to-4v more than output voltage?

I am using an NPN transistor as a switch but it follows the op-amp output voltage of around 5.3v! it is not a "switch" so it won't feed the 30v rail directly to the mosfet gate.

[Zero999]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

Here is the new circuit:
I will choose proper parts if the circuit works well, but now let me understand some stuff first.

Unfortunately most MOSFETs have a maximum gate-source voltage of under 20V. There are a few which are rated to 30V but not many.

Like the minimum voltage required for the mosfet to work?

That mosfet has Vgs_threshold of 2 to 4v so does that mean minimum voltage drop between input and output can be as low as 1v, but the minimum required gate voltage is around 2v-to-4v more than output voltage?

Yes, the gate voltage needs to be higher than the output voltage, by the amount required to pass the desired current with a low voltage drop. Beware that the threshold is often specified at a very low drain current, often under 1mA. To be certain the MOSFET will have the lowest possible on resistance at the maximum rated current, the gate source voltage often needs to be 5V or 10V. Read the data sheet carefully.

I am using an NPN transistor as a switch but it follows the op-amp output voltage of around 5.3v! it is not a "switch" so it won't feed the 30v rail directly to the mosfet gate.

The transistor is configured as an emitter follower. I don't see what good it will do. If anything it'll only make matters worse. There's no emitter resistor, so the MOSFET won't be able to turn off, only on. Try simulating the transient response by stepping the load current.

edit:
I've done that. The switch represents your 1 Ohm resistor.

[VEGETA]

well, for my application I need drop voltage of 1v between drain and source and so 21v to 20v will give me around 24.5v at the gate... but I think this is not what it means by Vgs.

If I understand correctly, Vgs is the voltage difference between gate and source thus for my application: 24.55-20v = 4.55v @ 2A of load current (load = 10 Ohms).

Now for a load of 1 ohm, it will be 20v/1ohm = 20 Amps which is just crazy and this will require (as you explained) around 39v of gate, so Vgs here will be 39-20 = 19v... so even this crazy situation we are still in the range of 20v (assuming my explanation is correct).

However, my supply will be 0-20v and 0-2A only! so I will put a maximum limit of 2A that is always there to make it suitable to our real world. What do you think?

I know the op-amp circuit for current measurement, and I will put a PIC MCU in the project to feed the required current limit. So the MCU will feed a continuous 2V (=2A of load current) to the op-amp comparator which has another 0-2v signal from the differential amplifier on the shunt resistor (0-2v for 0-2A) so that the maximum of 2A is the default case unless the user specified another limit. I will post a circuit soon.

As for the transistor, I put it because the op-amp alone used to oscillate for I don't know reason... plus I saw other designs using it too.

[VEGETA]

I tried to do the current measurement and limit but it didn't work. I don't know why.

[void_error]

You might want to clean that schematic up, redraw it. Not sure if you missed some connections...

[VEGETA]

I will post a new one tomorrow (I know it is messed up), but does this CC stuff work in LTSpice? can you make one to adjust current limit of a linear supply? I tried a lot tonight but no result xD.

[void_error]

Yes it does work. First thing you have to do is make sure your CV loop is stable so start there. AC analysis will be required. You might want to start reading this first.

[VEGETA]

Well, constant current source or dummy load circuit by itself worked with me before. However, in this file the voltage loop worked well and I got what I required but the CC part didn't.

I will try tonight again, but let's say it didn't work in simulation, will it work in real life?

[void_error]

Adding a CC loop is going to change the behavior of the CV loop and oscillations will start to appear when transitioning between CV and CC modes.

[Zero999]

well, for my application I need drop voltage of 1v between drain and source and so 21v to 20v will give me around 24.5v at the gate... but I think this is not what it means by Vgs.

If I understand correctly, Vgs is the voltage difference between gate and source thus for my application: 24.55-20v = 4.55v @ 2A of load current (load = 10 Ohms).

Now for a load of 1 ohm, it will be 20v/1ohm = 20 Amps which is just crazy and this will require (as you explained) around 39v of gate, so Vgs here will be 39-20 = 19v... so even this crazy situation we are still in the range of 20v (assuming my explanation is correct).

Yes, you are correct. It's the difference between the gate and source voltage which is important. However, you still need to be very careful, the maximum gate-source is never exceeded, which could easily happen as the circuit driving the MOSFET has the potential to inject >20V into the MOSFET's gate when the source is at 0V.

As for the transistor, I put it because the op-amp alone used to oscillate for I don't know reason... plus I saw other designs using it too.

That wasn't very sensible was it?

What about figuring out what the transistor does in the other designs you've mentioned? Can you post a link to them.

I will post a new one tomorrow (I know it is messed up), but does this CC stuff work in LTSpice? can you make one to adjust current limit of a linear supply? I tried a lot tonight but no result xD.

Perhaps you should concentrate on getting the constant voltage part right first? That would gain you a lot more experience with using LTSpice and circuit design.

[VEGETA]

Ok, can you post a CV CC simulation in LTSpice that works? what I understood from your posts is that there is something wrong with my CV part in the first place. However, I checked that it works.

[void_error]

Did you do an AC analysis? That usually indicates whether the loop is stable or not.

[VEGETA]

well, I restarted it from scratch and only made the CV section as you can see in the ATTACHMENTS.

no I didn't do AC analysis and quite honest I don't know it.

[VEGETA]

The voltage set opamp doesn't oscillate here but when I add diff amp for the resistor it starts to. even if it is not connected to anything.

[void_error]

Here's how you do an AC analysis:



V(out)/V(fb) is the response of the whole regulation loop.
V(g)/V(fb) is the response of the op amp
V(out)/V(g) is the response of the power stage, the MOSFET in this case

I've also attacked the LTspice .asc files for convenience.

The transient analysis clearly shows your circuit oscillates. To find out why it oscillates and how you can you fix that read the pdf I linked here.

[VEGETA]

Nice new info there! I will surely see it. However, how exactly do you know that the op-amp will oscillate? and most importantly, how do you know the solution?

I've seen a similar problem here: http://electronics.stackexchange.com/questions/92561/how-to-stabilize-a-control-loop-for-an-opamp-based-linear-regulator

[void_error]

Nice new info there! I will surely see it. However, how exactly do you know that the op-amp will oscillate? and most importantly, how do you know the solution?

First of all the MOSFET gate is a capacitive load and op-amps don't like driving capacitive loads unless specifically designed to do so. The MOSFET's input capacitance is being driven by a source (the op-amp's output) with non-zero resistance and that's a recipe for oscillation if no measures are taken to prevent that. In other words, the op-amp's output resistance will slow down the turn-on and turn-off of the MOSFET and the op-amp will end up over-compensating for the changes in the output voltage at best. Charging and discharging the gate capacitance will also need a significant amount of current which has to be sourced by the op-amp which will cause heating and if it oscillates then it might destroy the op-amp.

To get rid of the oscillation you must start by adding a resistor between the gate of the MOSFET and the output of the op-amp. Pick something in the range of 100R to 1k and you should be fine. If you redo the AC analysis you'll notice that the loop response has changed and it will still oscillate since by adding that resistor the MOSFET turns on and off even slower. To compensate for that you must add some R-C compensation networks in the loop. Hints are in the app note I linked. It focuses mainly on the LDO type regulators but the principle is the same for all closed-loop linear regulators. Read through it all the way to the bottom. The key words for stability are gain margin and phase margin.

Check out this thread, someone explained things quite nicely.