MOSFET linear regulator circuit

[VEGETA]

As a side note, I set output voltage to be 0.5v (0.1v too) and the SMPS rose up to 9v then settled to around 5.8v, I expected it to be something like 3.2v or so. It is kinda weird.



___

That aside, you mentioned OP2170 but I see OP2177 better with slightly more price. What do you think? what about other op-amps in the previous post?

I want to know how to precisely simulate such third party op-amps in ltspice, so I stop relying fully on LT parts. Other candidates are something like:
1- LT1801 which is 80MHZ (too much more than needed), but still confused about offset.
2- OPA2180, this one seems nice. 2 MHz, 15uV offset (max is 75uV) which is totally suitable for true 1mV step.
3- OP2177 which is mentioned before.



I put some conditions and this was the resultant Digikey search: HERE

Hmmm LT6014 is for sure suitable for x5 gain but in test it performed very well and accurate. So here is what I think about:

Assuming 2.048v reference:

16-bit DAC has one bit of around 31uV which means 310uV/uA output capability.
14-bit DAC has one bit of around 125uV which means 1.25mV/mA output capability.

So for 16-bit DAC we need an op-amp with 31uV offset to be able to differ between one bit and the other... Or maybe a 100uV op-amp that treats 3 bits (~94uV) as its smallest step which will still allow for true 1mV\mA step. While 14-bit DAC can run with more op-amps but it is 1.25mV not 1. So I am confused, especially that 16-bit DAC is so expensive!

So now I need a true 1mA/1mV smallest step capability, but confused about what to do... 16-bit or 14-bit dac with relatively normal op-amp?

Using a 1 W

we can get the 2W or even 3W version with slightly more price.

Shuntdown on the linear stage will make the SMPS stage to go towards about 1 V, not 0 V. So the chip is already active.

I don't think so, because SMPS chip has some kind of a minimum output voltage but I am not so sure. So how to do output enable and other stuff?

[VEGETA]

Well, even the more powerful EEZ supply is specifying a 10mV/10mA step "or better" as they call it, so I wonder if our 1mV step is a dream or not. The strange thing is that they at EEZ have 16-bit DAC/ADC so fully capable of around 39uV steps (2.5v ref) but they limited it to 10mV step.

[VEGETA]

For now, the best choice is:

Op-amp: LT1881 [ http://www.linear.com/product/LT1881 ], 5.78$ @ digikey which is not cheap but surely powerful.

DAC: MAX5136 [ http://www.digikey.com/product-detail/en/maxim-integrated/MAX5136AGTG-/MAX5136AGTG--ND/2041669 ] which is 16-bit (or 12) and cheap, around 4.5$

Voltage reference: MAX6071 [http://www.digikey.com/product-detail/en/maxim-integrated/MAX6071BAUT21-T/MAX6071BAUT21-TCT-ND/5051521] around 2.16$ which is not cheap but 10ppm quality.

OP-amp is 50uV max which is good enough, 30uV typical < one bit of the DAC. Now it surely can output 1mV by a very big margin. Actually a maximum offset of 50uV can output 0.5mA but that is not needed and maybe not possible considering the rest of the circuit. I am not sure about the DAC since it is half the price of the other 16-bit DACs, what do you think?

so 4.57 + 5.78 = 10.35$ for just 2 parts xD. the adc won't be cheaper than 5$ too which makes it 18$ (with V_ref) for just a portion of the analog circuit, but I guess it is worth it. By this we have strong analog core.

P.S: Hmm what is the price you think this project can be aimed at? just a question of curiosity xD. I originally wanted a 100$ maximum price but the parts alone might cost that lol.

[Kleinstein]

The MAX5136 is a lower grade 16 bit DAC - thus the relatively low price. Anyway with this DAC there is no need for a super accurate OP. So the LT1013 or OPA2170 should be well good enough for the current part and the voltage part could us the TLC272 or similar. Also using just TLC272 (or TS272) should be OK. Remember that the offset voltage itself is not a problem - software can compensate for this error. Adjustment at 0 voltage / current does not even need a good meter. Due to the INL specs of the DAC, 1 mV steps would not be really accurate, but one could still offer them. One can always decide later if one wants to show the not fully accurate 1 mV steps.  The EEZ supply is for a higher output voltage range and for this reason might not want to offer 1 mV steps.

The DAC even includes a reasonable good quality reference. So one could get a way with the internal reference. This supply will not be super low noise anyway due to the SMPS part - so the main drawback of the internal reference (the relatively high noise) does not matter that much. There are also ADCs with internal reference (e.g. MCP3422) - so one could get away without an extra reference.

Also remember that there are other parts that also contribute to drift: the two resistors in the divider for the voltage and the shunt and set point divider for the current setting. So something like a 50ppm/K rating is already relatively good for a PSU.

For other OPs, there is the universalOP2 model. Here one can adjust the main parameters (GBW, SR, ouput current) to what one needs or knows form the DS. With the common mode range and special properties (like latchup on leaving the CM range) one has to take care be hand. Things like saturation of the output might not be well modeled in more specific models too.

[VEGETA]

How about this 8.5$ DAC: DAC8552 ? It is for sure better than the previous one but with huge price jump. Now maybe we can just rely on LT1013. However, I don't yet understand why the op-amp offset is not a problem. DAC gets accurate voltage out while the opamp such as LT1013 can offer out 150uV offset which translates to 1.5mV accuracy only, my point is that since the opamp is the last one in the chain then it determines accuracy assuming DAC already meets the accuracy specs.

Note: this DAC [ http://www.digikey.com/product-detail/en/cirrus-logic-inc/CS4334-KSZ/598-1046-5-ND/923166 ] is 24 bits and 3$. What??

So LT1013 can recognize around 4.8 bits of DAC as its smallest step. one step is 31.2uV which is *6 = 150uV. Maximum offset is around 200uV so 6.4 DAC bits. Anyway LT1013 (from Linear @ Digikey) is 4$ while the significantly better LT1881 is 5.78$ which is not much difference. Also, you said it maybe slow.

op-amps in ltspice

I made this:

GBW=2Meg Slew=1Meg Vos=30u

so it is 30uV offset and 2MHZ gain. while 1MEG slew is weird as well as the rest of the parameters. I wanted to simulate OPA2180 which I think can be good choice here.

OPA2180

I think this one is the one. It has a maximum of 75uV offset while having 15uV typical offset. It is 2.87$ @ Digikey which is great. 2 MHZ which is nice, also Zero-Drift type of 0.1 ?V/°C. I am somehow comfortable with this, while not being linear.com part lol. What are the parameters needed to simulate it in ltspice rather than the ones I mentioned above?

This part (and all new ones) do not have the PSPICE file which is compatible with LTSpice... which is silly from TI really!

___

So far we have 16-bit DAC (MAX5136 or DAC8552) and OPA2180 op-amp and any good external 2.048v reference (not necessarily the one I mentioned... maybe a 1$ one is good). This will surely allow us to have 1mV output resolution, right?

As for ADC, MCP3422 that you suggested is fine. 18-bit with 2.048 is 262144 steps of 7.81uV. Even if internal reference has some error, it will be more accurate than the 16-bit DAC. The cheapest one with external reference is LTC2489 which is around 4.5$.

I would be very happy if we could achieve 1mV steps without these parts, especially the DAC beast. So something like 14-bit of 125uV steps... can it work? The issue here is our opamps are designed to output a gain of 10 which requires 16-bit DAC to get 1mV steps.

Also remember that there are other parts that also contribute to drift: the two resistors in the divider for the voltage and the shunt and set point divider for the current setting. So something like a 50ppm/K rating is already relatively good for a PSU.

So what is the best resolution step that we could achieve? if we can not get 1mV resolution even by using such good analog ICs, then it is better to get cheaper parts (12-14 bits of DAC for example), right?

Hmmm what does 50ppm mean here?

___

One thing more to mention is that if we choose an output voltage below 2v doesn't achieve 1v dropout. most of these output voltages like 100mV gives something like 6v on the SMPS output... I tried putting a current source on mosfet gate (fed from "P") but no use. I couldn't figure this out, can you?

I guess minimum voltage of this smps ic is around 3.2volts... so why not getting it for these low output voltages.

[Kleinstein]

The offest voltage of the OPs, does not really matter, as it stays constant and the µC can correct it. So the µC will add the appropriate values to make the output or reading fit. This needs to add a little intentional offset so you have an adjustment range that also includes something like -5 mV in case the OPs offset is +5 mV.

The DAC8552 does not look better to me than the cheaper Maxim part. This DAC itself has an offset spec of 2,5 mV typical, so it would need software adjustment anyway.

The CS4334 is an audio DAC - need even a very cheap one. The problem with these is they usually have quite some drift one the gain - so like having a poor quality reference (100 ppm/K spec for the gain). They may also need a certain data rate and might not even allow for DC output (some do, some don't).

The OPA2180 is a AZ OP. These usually have a significant recovery time from saturation. So one has to make sure there will be no extra glitches from that. For one direction there is that extra transistor already - so with some care it could work. However the CV mode part would need some additions (e.g. a similar transistor) and the output disable also needs to take care of this.

[VEGETA]

Hmm so what is your suggestion for the prototype in terms of parts? if there are modification to the circuits, then let's do it now. I didn't understand saturation time effect relationship with the extra transistor, but what good care is necessary to overcome that? I am now confused about which op-amp is to be chosen for final circuit with high quality.

Also, should we limit the steps to just 10mV instead of 1mV? I see 10mV kinda practical enough with cheaper 14-bit DAC (125uV/bit) and even 12-bit DAC (0.5mV/step)! Downgrading the design from 1mV/1mA to 10mV/10mA is a brave decision of some kind. What encourages me is that no other design is offering any better or in particular 1mV steps of the output. Not EEZ nor Ian's one. So what do you think?

Cheapest 14-bit DAC is LTC2612 with around 7$ which is not much different than 16-bit one. However, something like MCP47FEB22 12-bit DAC is kinda good enough if you don't have any comment on it's internal limits. I mean, 500uV/step is 5mV step of output voltage and current. So 2 bits can be 10mV step that we want.

This may open the door to use even cheaper ADC and op-amps. I still want your opinion on this drastic change. So either we go by it or return to aim for 1mV resolution and solve the problems that we have.

and the output disable also needs to take care of this

How about we delay this to post-prototype time?

I still didn't figure out how to do it - I assume it is the exact same "output enable" feature. The only OE I thought of is putting a transistor which turns off the linear mosfet gate. However, you don't seem to like it.

The other rather harsh solution is to get a transistor or a mosfet to pull SHDN/UVLO pin of LT3757A to negative (ground) to turn it off. I don't know but does the same thing can work if we tied the gate of Q2 (or it's input) to ground/negative to turn the whole thing off?

right now I wanna try to pick some final decisions on parts so I can start doing some real PCB stuff by the end of this month when I get a new laptop.

__

You haven't told me about your opinion on the pricing if this thing ever made it to crowd funding or something similar.

thanks again for your generous efforts.

[Kleinstein]

Except for the rather small case, the Maxim DAC looks good. There is a larger case available too
The very cheap 12 bit DAC is not really good - it is more like 10 good bits and 2 of limited accuracy. Much like many of the 16 Bit DAC having 14 good ones and 2 more which are below possible error levels. So the cheap 12 Bit DAC would not really be good enough for 10 mV steps - even worse than the cheap 16 Bits DAC for 1 mV steps.

One could still make a version with the cheap 12 Bit DAC and thus cheap OPs (like TS272). This would give something like not very equal 10 mV/1 mA steps to set the voltage, but could still give a 1 mV and 0.1 mA reading.

Even with the Max5136 one could still use the TLC272 and get about 1/10 the setting accuracy (1 mV and 0.2 mA, though not perfect). The current loop might profit a little from a better OP (e.g. LT1013 from Ti, OPA2170/1), but not that much. There is already something like a 0.5 µV/K drift from the DAC after the divider.

The extra transistor (the PNP at the CC regulator in the shown circuit) prevents the OP from going to positive saturation, e.g. when CC limiting as not currently active. A similar circuit could be added to the CV regulation as well. Depending on the OPs used this might be a good idea - especially with an OP that is slow to come out of saturation (or just slow).
Having the OP in negative saturation is not bad - this should not happen in normal operation and would just have the output disabled for a little ( usually < 1 ms) longer than normal. So it should not be a real trouble.

One part of output enable could be just pulling down the gate to GND. However there should also be a way to make sure this is done of the DCDC converter gives about 3-6 V during start up and there should be disabling of the minimum load / down programmer. So output disable and prevention of a startup glitch might need a little more than just one resistor.

[VEGETA]

Ok, to make some kind of conclusion to this, this is my decision so far:

Op-amp: OP2177
DAC: MAX5136
ADC: MCP3422
V_Ref: MCP1501

Specs:

voltage set: 1mV step (if it showed serious problems, 10mV it is! but we will aim seriously for 1mV)
current set: 1mA (should be well capable to do it)

the other packaging of the DAC is 6.6$ which is 1$ more. Why this package is bad?

Now since the critical parts are done, what about the voltage sensing op-amp?! how accurate should it be to get 1mV accurate reading? if the requirements are high as the others, why not having a nice quad op-amp like: OPA4180 (same as OPA2180 which requires CV modification) or OPA4197 which seems nice?

Here is my calculations for the voltage sensing opamp, I hope they are kinda correct:

assume 10.001V output, now this is divided by 10 which means 1.0001V to be fed into the ADC. Thus our op-amp should have the capability to recognize the 1mV in the input and the 100uV in the output. So an input offset voltage of 1mV is enough for the task, but I am not sure about the output. I assume the output is OK as long as the op-amp deals fine with the input.

This means pretty much any cheap op-amp like TLC272 is good for the task, this package is the version with 290uV: Here.

while the others are 900uV and 1.1mV which won't work. What do you think about this quick analysis? Even this TS272 shows suitable requirements too and it is 1$ of price! So this has 2 op-amps, one for the important voltage sense and the other for CV\CC indication which is not important at all.

Can we consider this a final decision?

One part of output enable could be just pulling down the gate to GND. However there should also be a way to make sure this is done of the DCDC converter gives about 3-6 V during start up and there should be disabling of the minimum load / down programmer. So output disable and prevention of a startup glitch might need a little more than just one resistor.

I couldn't get that, you mean the shutdown pin of LT3757A that I mentioned? Or the gate of the linear mosfet?

The extra transistor (the PNP at the CC regulator in the shown circuit) prevents the OP from going to positive saturation, e.g. when CC limiting as not currently active. A similar circuit could be added to the CV regulation as well. Depending on the OPs used this might be a good idea - especially with an OP that is slow to come out of saturation (or just slow).

Yup I knew it is like this. By positive saturation you mean the full positive rail being equal to the output as seen here? So it needs time to get from there to negative when we want it to be active, right? isn't slew rate the one responsible for that?

Having the OP in negative saturation is not bad - this should not happen in normal operation and would just have the output disabled for a little ( usually < 1 ms) longer than normal. So it should not be a real trouble.

if my previous lines were correct, negative saturation is the output of the op-amp being exactly equal to it's negative supply, but why would this affect the output disable?

[Kleinstein]

The MCP3422 has an optional internal gain of 8 and differential input. So it can work with a +-250 mV  range and thus can measure the current without any extra amplifier. It has still something like 17 Bit resolution. However direct sensing will not work with the voltage, as the voltage is negative - so it needs the difference (mainly inverting) amplifier.

The OP for voltage sensing is not that critical. So the TS272 is good enough, even the cheap version with something like 2 mV offset is no problem, as software can subtract it. Even than 1 mV or even 0.1 mV (at least with lower voltage) resolution should be possible. It is only if you need to avoid the zero adjustment that a zero offset OP is really needed.

The small version of the max5136 has an exposed bottom pad - this one is usually difficult to solder, though I am not sure it needs to be soldered. So soldering would need something like a good reflow process. The TSSOP case is much more conventional and could still be soldered by hand, if trained.

I don't think the MCP1501 reference would be an advantage over the DAC internal one - so no need for it.

Even with the 16 Bit DAC, I see no reason to use an expensive OP2177 - the OPA2171 should be good enough. Having an Rail to Rail output has the advantage that is could work with a relatively low voltage from the DCDC converter too.

Depending on the µC used, one might not even need the extra amplifier working as comparator for CV-CC mode. Quite a few µC have an internal comparator that could be used. So it would be 6 resistors instead of the OP. This would leave only 3 OPs - so one good one and two more simple ones for the CV mode and measurement.

The normal output enable would be mainly at the MOSFET gate. One might also turn of the SMPS, but this would be more like a separate path from the µC, as to avoid startup of the SMPS with the linear output enabled.

With positive saturation a meant saturation at the positive rail. How long it takes to come back from this depends on the OP. With normal OPs this could be about 1 µs. It is not directly related to the slew rate, though faster OPs tend to be faster here too. However with AZ OPs (like the OPAx180), it can take much longer, more like 100 µs. So it needs a modified circuit.

[VEGETA]

The MCP3422 has an optional internal gain of 8 and differential input. So it can work with a +-250 mV  range and thus can measure the current without any extra amplifier. It has still something like 17 Bit resolution. However direct sensing will not work with the voltage, as the voltage is negative - so it needs the difference (mainly inverting) amplifier.

So we have 2 TLC272 or whatever op-amp, one for voltage sensing and one for current sensing.

The OP for voltage sensing is not that critical. So the TS272 is good enough, even the cheap version with something like 2 mV offset is no problem, as software can subtract it. Even than 1 mV or even 0.1 mV (at least with lower voltage) resolution should be possible. It is only if you need to avoid the zero adjustment that a zero offset OP is really needed.

Well, maybe I am not understanding offset voltage properly. My understanding is that it is the minimum voltage value that the op-amp can recognize. So if it has 100uV offset, it cannot differ between 30uV and 90uV for example. Is that correct? What will the software be able to do here?

The small version of the max5136 has an exposed bottom pad - this one is usually difficult to solder, though I am not sure it needs to be soldered. So soldering would need something like a good reflow process. The TSSOP case is much more conventional and could still be soldered by hand, if trained.

Fortunately it doesn't need to! This is from datasheet:

Exposed Pad. Not internally connected. Connect to a ground or leave
unconnected. Not intended as an electrical connection point.

So consider that it doesn't exist. Simple!

I don't think the MCP1501 reference would be an advantage over the DAC internal one - so no need for it.

The only problem with the internal reference is that it is 2.44v not 2.048v I want. So I've got to have this one. It is cheap and there is cheaper but 150ppm which is not good, this one is suitable.

Or maybe we could use it to get a 37.2uV step (instead of 31.2uV) and still get 1mV and 1mA. What do you think?

Even with the 16 Bit DAC, I see no reason to use an expensive OP2177 - the OPA2171 should be good enough. Having an Rail to Rail output has the advantage that is could work with a relatively low voltage from the DCDC converter too.

OPA2171

OPA2171 has 250uV offset and according to my understanding it cannot handle 1mV. As I mentioned above, I might be misunderstanding the concept of offset voltage.

Is it the minimum voltage between the 2 inputs of the opamp that it can recognize\sense or is it something else. If it is like I said, 250uV will be x10 = 2.5mV minimum output step. Please clarify if you know better, which I am sure you are. Didn't get the DCDC low voltage part too.

Depending on the µC used, one might not even need the extra amplifier working as comparator for CV-CC mode. Quite a few µC have an internal comparator that could be used. So it would be 6 resistors instead of the OP. This would leave only 3 OPs - so one good one and two more simple ones for the CV mode and measurement.

yes, you reminded me with PIC MCUs CCP module, it has "capture" mode. The good one is for CC and since it will have 2 op-amps in it, we will use it for the CV too. This leaves us with another cheaper dual op-amp for voltage and current measurement. seems nice!

The normal output enable would be mainly at the MOSFET gate. One might also turn of the SMPS, but this would be more like a separate path from the µC, as to avoid startup of the SMPS with the linear output enabled.

I got what you mean, which is turn the SMPS first then turn the linear stage right? Hmmm maybe we can make an analog circuit for this function instead of relying on the MCU... something like a comparator cheap op-amp to activate the supply for the mosfet (and OE) when SMPS is ready (dunno what is the condition). However, this won't make it in the prototype. How to make one for SMPS without uC? maybe an opto-coupler should be used to control the circuit since it has different grounding.

With positive saturation a meant saturation at the positive rail. How long it takes to come back from this depends on the OP. With normal OPs this could be about 1 µs. It is not directly related to the slew rate, though faster OPs tend to be faster here too. However with AZ OPs (like the OPAx180), it can take much longer, more like 100 µs. So it needs a modified circuit.

for now the OPAx180 is not to be used, thus won't be a problem.

[Kleinstein]

The offset voltage is an additional DC voltage the OP sees at its input. As a consequence it looks like the input voltage is to high (or low) by that amount. However as the offset voltage is essentially constant this is only shifting the zero. So there is no problem in detecting voltage changes that are much smaller. In combination with an DAC and ADC the µC can simply add a certain number to the digital value. So the offset voltage is not an important parameter here.  The more important parts are drift of the offset voltage and the low frequency (noise) - the limit on how much the OP can resolve is more like 10 K * drift specs + noise specs. So for the TLC272 this is something like 10 K * 2 µV/K + 3 µV = 23 µV.

The DACs discussed here also have an offset spec (called DC zero error): this is in the 5 mV range.

It does not matter if the Ref voltage of the DAC is 2,5x V: The ration of the DAC output to the final ouput voltage / current is set by a resistor divider. So one can adjust it there. So better use 2 extra (possibly slightly odd) resistor values in the BOM instead of an external reference.

Doing the disable / enable sequence for the SMPS and linear part is perfectly Ok for the µC. There is nothing really bad happening if something goes wrong in the sequence and something like a delay in the 10-100 ms range is very easy for an µC. Sending the signal to the SMPS is a little tricky, but still possible without an opto-coupler.

While we can get away without the OP to sense CC/CV mode, we might need an extra OP to buffer the output of the voltage setting DAC. This is needed if we need / want an extra filter to reduce higher frequency noise of that OP.

[VEGETA]

The offset voltage is an additional DC voltage the OP sees at its input. As a consequence it looks like the input voltage is to high (or low) by that amount. However as the offset voltage is essentially constant this is only shifting the zero. So there is no problem in detecting voltage changes that are much smaller. In combination with an DAC and ADC the µC can simply add a certain number to the digital value. So the offset voltage is not an important parameter here.  The more important parts are drift of the offset voltage and the low frequency (noise) - the limit on how much the OP can resolve is more like 10 K * drift specs + noise specs. So for the TLC272 this is something like 10 K * 2 µV/K + 3 µV = 23 µV.

YES! that sums it, I was understanding it so wrong! thank you very much, your previous posts seems clear sense!

According to that and since we have 4 precise op-amps (CV, CC, V_mon, I_mon), I picked this one: OPA4171. It is around 2.5$ and quad op-amp, 3 MHZ, 1.5v\uS slew rate which is kinda nice. This seems a final choice. Never mind other non-important op-amps for now, they can get whatever there is available. This one is faster than LT1014 too.

DAC internal reference

well, I read this in the datasheet:

Configure other reference voltages by applying
a resistive potential divider with a total resistance
greater than 33k? from REFO to GND

which means we can get away without an external reference, but I don't know how could it be a precise 2.048v since resistors are not perfect and the ratio is hard to get correctly. Also DSh didn't specify clearly how to connect refi and refo with the resistance divider.

this site: http://www.ti.com/download/kbase/volt/volt_div3.htm offers a calculator which resulted in odd values (1.47k and 7680k), so if they exist we would have to buy them specifically for this purpose. Here they are from digikey:

http://www.digikey.com/product-detail/en/panasonic-electronic-components/ERA-3AEB1472V/P14.7KDBCT-ND/3075805
http://www.digikey.com/product-detail/en/panasonic-electronic-components/ERA-3AEB7682V/P76.8KDBCT-ND/3076054

they are 0.1% and price is nice, but will buying these 2 odd values better than getting an external reference? combined cost is nearly the same xD.

Doing the disable / enable sequence for the SMPS and linear part is perfectly Ok for the µC. There is nothing really bad happening if something goes wrong in the sequence and something like a delay in the 10-100 ms range is very easy for an µC. Sending the signal to the SMPS is a little tricky, but still possible without an opto-coupler.

so turn off the linear part then switching one, and for on we turn switching first then linear. sending the signal is something to be made later, but an extra cheap opto is not a big issue.

While we can get away without the OP to sense CC/CV mode, we might need an extra OP to buffer the output of the voltage setting DAC. This is needed if we need / want an extra filter to reduce higher frequency noise of that OP.

why do we need such a buffer stage? is it due to output and input impedance? I am afraid buffering with a normal op-amp will cause even more quality errors.

[Kleinstein]

There is no need for an extra OP to amplify the current signal: the MCP3422 is perfectly fine with a +-250 mV full scale range and 200 mV full scale at the shunt.

There is no need to scale down the reference voltage before the DAC: to set the current, there will be a voltage divider of about 1:12,5 to bring the 0-2,5 signal from the DAC to an 0-200 mV  (or a little more) for regulating OP.
For voltage regulation the gain is set be the two resistors in the feedback circuit (currently 10 K and 1 K - but should be slightly larger values like 3.3 K and 27 K, as the DAC output is a little weak).

As the DAC is not perfect to the last digit, there is no much sense in get an exact scaling to something like 0.333 mV per DAC step.  It is not a problem if the full range of the DAC might be good for a -50 mV to 21 V range. The fine adjustment of the gain can be done in software. So there is no need for 0.1 % precision resistors - one the drift of the two critical resistors that set the gain should be reasonable low.

If not buffered the output resistance of the DAC would enter in the gain. As this should be low - it would not yet be a problem. However cheap references like the one in the DAC usually have quite some noise and it might be worth filtering at least the higher frequency part of the noise. As there will be some noise background from the SMPS part anyway, my guess is just filtering between Ref_out and Ref_in should be good enough (e.g. 50 pF + 1K/1µF). So no absolute need for an extra buffer after the DAC, but it could help a little.

The output disable should be two stages: On turn off one could stop the linear stage and SMPS together. To turn on, it might be better to first turn on the SMPS and with a little delay turn in the linear stage and maybe even ramp up the DAC (in software) after that.

I think the OPAx171 is a good choice - initially I did not like it very much for being Rail to Rail, but this is only a problem near the upper supply - so it would not apply in this application. Having an OP with Rail-Rail output allows a relative low supply. So we only need something like a + 6 V and -0.5 V.

So far the circuit only needs 3 OPs - so a 4 th OP could be used for the DAC filtering / buffering anyway.

[VEGETA]

There is no need to scale down the reference voltage before the DAC: to set the current, there will be a voltage divider of about 1:12,5 to bring the 0-2,5 signal from the DAC to an 0-200 mV  (or a little more) for regulating OP.
For voltage regulation the gain is set be the two resistors in the feedback circuit (currently 10 K and 1 K - but should be slightly larger values like 3.3 K and 27 K, as the DAC output is a little weak).

Well I still prefer the previous approach of a unified DAC reference of 2.048v by the 2 resistors I posted. I didn't want to divide the current voltage and just use up to 200mV out of 2.048V but now I am more convinced that a full 2.048V then divide it by 10 is better in terms of resolution. This is better for voltage too, so clean numbers for everything. no need for the 3.3 and the 27 ones.

As the DAC is not perfect to the last digit, there is no much sense in get an exact scaling to something like 0.333 mV per DAC step.  It is not a problem if the full range of the DAC might be good for a -50 mV to 21 V range. The fine adjustment of the gain can be done in software. So there is no need for 0.1 % precision resistors - one the drift of the two critical resistors that set the gain should be reasonable low.

So you suggest using the full range of the DAC of 2.44v? well, it could be done without problems. The 0.1% resistors are actually cheap so they are not that much critical in terms of money.

So far the circuit only needs 3 OPs - so a 4 th OP could be used for the DAC filtering / buffering anyway.

yes, I originally wanted to make a current monitoring op-amp but since the range is so low then it is ok... especially is that the voltage is positive with respect to the true ground which the uC/DAC/ADC side.

[Kleinstein]

The 10K/1 K resistors in voltage feedback in the last simulation would be too much load for the DAC, but going higher in impedance here is not a problem.
Even with a 2.4 V reference one could use the voltage feedback with lets say 100 K and 10 K. Thus would leave a little over range (e.g 24 V). If the range should be not much higher than 20 V it would be 12 K and 100 K. The resistors should be good quality but no benefit from a low tolerance. I know sometimes the low TC resistors come in 0.1% only. I see no advantage in dividing the reference to 2.0x V first - it only adds more resistors and does not even help much in getting a simpler divider: with a 2 V reference one would need a 1 K / 9 K divider for the current setting. With a 2.4 V reference one could use 1 K and 10 K.

From the whole circuit the resistors that need to be stable are the shunt, the two for dividing down the DAC voltage to set the current, the two in voltage DC feedback and two of the voltage reading amplifier.

The other two resistors at the voltage reading amplifier look a little odd as they go to GND and sensing the positive output which is connected to GND too. So they don't have to be accurate, as they are only to compensate for a small possible drop in the wires. One can even get away without them, as the ADC has a differential input that works all the way down to GND and a little below - just use the right point (output connector) to sense.

[VEGETA]

The 10K/1 K resistors in voltage feedback in the last simulation would be too much load for the DAC, but going higher in impedance here is not a problem.
Even with a 2.4 V reference one could use the voltage feedback with lets say 100 K and 10 K. Thus would leave a little over range (e.g 24 V). If the range should be not much higher than 20 V it would be 12 K and 100 K.

you mean R1 and R2? you mean the value is too low impedance? I thought it is good enough.

Why they can be 1k and 10k while the CC resistor divider should be 1k and 9k? 1 and 9 makes a perfect /10 factor but is R1 and R4 doing the same job of dividing input DAC voltage by 10? I don't think so.

I am not sure I understand the concept of R1 and R4 correctly, but they are dividing the negative voltage with respect to ground which is the output voltage itself divided by 10. So for a voltage of 5v it will be 500mV which will make its way to the op-amp + input while the - input is always tied to ground... so here is what happens according to me:

1- there is 500mV on + input (cuz it is from ground reference to negative output) and a constant 0v at the - input.
2- this makes the output of CV op-amp is the positive rail which is 9v, this means it is not active since it is already 9v before the diode.
3- DAC outputs 500mv which will cancel out the other 500mv making it negative output of the op-amp.
4- negative op-amp output = CV is active and diode is on.

is it correct? here I noticed the voltage at the R1 and R4 junction is not 500mv precisely... is it due to not being 1k and 9k?

I see no advantage in dividing the reference to 2.0x V first - it only adds more resistors and does not even help much in getting a simpler divider: with a 2 V reference one would need a 1 K / 9 K divider for the current setting. With a 2.4 V reference one could use 1 K and 10 K.

The benefit is getting a pure 2.048v from the DAC then feed it directly to the voltage op-amp to get a maximum of 20.48v (20 is the true wanted value) and feed it also directly to CC opamp to get 2A maximum. For current op-amp I originally planned to never use any resistor divider and just output a maximum of 200mV out of the DAC. Your idea is to output the full 2.048v from the DAC to a resistor divider then to the CC opamp which maybe achieves better resolution but needs resistor divider. Your idea might guarantee 0.1m setting steps but I aim at mere 1mA which is achievable in my method.

My point was since we are making a maximum of 20v why using 2.44v? it will give 24.4v so we are wasting around 1201.49 bits of resolution (from the total of 65536)... so the better idea is to use the full resolution to give the output that we need.

What is the best choice here? calculations with 2.44 is a bit harder and clean as 2.048v one.

From the whole circuit the resistors that need to be stable are the shunt, the two for dividing down the DAC voltage to set the current, the two in voltage DC feedback and two of the voltage reading amplifier.

which are what I thought too. 0.1% is good to have while being so cheap, but temperature stability is something else and might be costly.

The other two resistors at the voltage reading amplifier look a little odd as they go to GND and sensing the positive output which is connected to GND too. So they don't have to be accurate, as they are only to compensate for a small possible drop in the wires. One can even get away without them, as the ADC has a differential input that works all the way down to GND and a little below - just use the right point (output connector) to sense.

since I am buying 0.1% of 1k and 10k resistors, I thought of why not also get these two to make gain better and more stable. Should they be 1k and 9k too or these values are good?

[Kleinstein]

The DAC is limited to a 2 K load, as is can't accurately drive a higher current. So R1 and R4 should get larger. For the set voltage the ratio is R4/R1, so with the 1K and 10 K resistors this would be exactly 10. But 1 K /10 K is to much load for the DAC so we need higher values, still with a ratio of about 1:10 to 1.2:10.
The DAC steps are not that accurate, so i think it would be worth the extra divider to get good 1 mA steps. With the voltage setting 1 mV steps are possible but they will not be very equal - so the errors would be something like +- 0.3 - 0.5 mV DNL and +- 2-4 mV INL for the voltage. So I don't think one should through away a factor of 10 in the current resolution and this way get only marginal 1 mA steps if a much better way would be possible with just two resistors.

Adding an extra divider to get 2.048 V out of the 2.44 V also adds two resistors, with at least one new value. When using a 2.4 V ref one could use a 1 K and 10 K (or 10K/100K) divider for the current setting and a 12 K and 100 K or 10 K and 100 K resistor pair for R1/R4. The nominal range would be something like 2.2 A and 21 V / 24 V. So not that much is lost of the DAC range, especially if 12 k are used.

For voltage sensing I would go for something like 100 K and 10 K and leave out the GND side completely - so use the differential input of the ADC to get the correct sensing.

No need for 0.1% resistors, it is better to have <= 50 ppm/K, even if they are +-5%. These are also not that expensive (e.g. like 10-15 cents). A consolidated BOM could use 3 pairs of 10K and 100 K and the shunt as precision resistors only.

[VEGETA]

I didn't get why it is 1.2:10 ratio instead of the normal 1:10, since it is for accurate clean number measurement.

Also, if we are to use full DAC ref, it will be 2.44 not just 2.4v. So why not actually using an external 2.048v ref (rather than the one I linked here if you hate it) to get clean number and best resolution?


As for resistor values, I am not fond with 12k value so why not 10k in series with 1k and 1k? we are going to get 0.1% of these resistors anyway. Or like you suggested of using 0.1% < 50ppm version of 10k and 100k only... actually it is a good solution since it gives the same factor but this leaves the 12k one... should it be precision 10k resistor with normal 1k+1k resistors? or just get precision 1k resistors too?

As for consolidation, we have 10, 20,500k,100,15k,2k,50k and especially 106k+46.4k and the 43.2k resistors of the smps chip. As for caps we have 10p, 20p, 10n,20n,1n,10,200p,200n,100p,1u.....etc especially the 4.7u of the smps both in the series path or input filtering... it shows "x2" mark which I don't knwo what it is. Does it mean 2 in parallel?? my consolidation way is for example, for the 20n cap I could get 2 of 10n in parallel and same for others. do you agree? However, the 500k needs 5 of 100k in series which is not pretty.


So my first guess is to get these values:

R: 10, 100, 1k, 10k, 100k + other odd value ones + special precision ones.
C: 10p, 100p, 1n, 10n, 100n, 1u, 10u + SMPS big filtering 100uF electrolytic caps

So for example, we can use 1n instead of the 100p for most parts except for C9 which is in the current compensation network, unless you have a way of doing that. Similarly the 200n (2 of 100n) in the output filtering of the linear stage. While we can use 2 of 10R in series instead of R33 (in voltage feedback), we cannot (I assume) use 2 series capacitors to get a smaller value one unless it really functions the same.

I already changed diodes, shottkeys, pnps... to get SMD parts for them and use the same part for all.

[Kleinstein]

The 1.2 to 10 ratio would be to get closer to a 20 V maximum range for the DAC. The 12 K could be a precision 10 K and a normal (not too bad) 2 K in series, or just a stable 12 K.

Under voltage lockout for the LT3757 is at 2.7 V at the input so with an 100K/100 K divider this would be 2.7 V per cell. Could be already low. Anyway only one odd value would be needed. So one could end up at 100 K and 110 K.

If parts in a schematics a marked as x 2, they are supposed to be there several times. 2 of the 4.7 µF caps at the input is a good idea. Not sure it would help with the coupling capacitors between the inductors, as the current is now divided over two caps already.

[VEGETA]

Long time no see 

I am gonna restart working on this next week (after this period of my current work at the factory), so PCB design of the prototype is what needs to be done.

Anyway, I wanna revise this:

Adding an extra divider to get 2.048 V out of the 2.44 V also adds two resistors, with at least one new value. When using a 2.4 V ref one could use a 1 K and 10 K (or 10K/100K) divider for the current setting and a 12 K and 100 K or 10 K and 100 K resistor pair for R1/R4. The nominal range would be something like 2.2 A and 21 V / 24 V. So not that much is lost of the DAC range, especially if 12 k are used.

If DAC [ https://datasheets.maximintegrated.com/en/ds/MAX5134-MAX5137.pdf ] voltage is 2.44v, when we put 10k/100k between REFO and ground while connecting the divider output (between 2 resistors) and connecting it to REFI... we will get around 2.44*100/110 = 2.21v (could be 2.17v if 12k/100k used).

So we should make this resistor at DAC so that its output is 2.21v without dividers at the OP loop side?

Assume it is 2.21v @ full 16-bit, this would be good for voltage since we have R1/R4 = 10k/100k to get the /10 gain... so it is ok without problems since no extra resistors will get in the loop.

However, the problem in my understanding is in current loop. 2.21v will need to be amplified by /10 for the OP as you know... this means if you put 10k/100k this will not give an exact division of 10! so you need 10k/90k which is not good for parts consolidation AND it will mean extra resistors in the loop. I made an op-amp circuit to divide the 2.21v by a factor of 10 same as the voltage measurement but not sure if this is good enough.

By that we use OPA4170 chip for: CV op-amp, CC, voltage measurement, current /10 gain buffer. This will mean we need other op-amps for CV/CC indication and other stuff that will come out.

What do you think?

You seem to have 2 dividers for each loop and maybe you are not dividing the DAC reference like I explained. My whole problem is in getting an accurate division result.

So for example, if 2.44v is used and you want 1A this will mean 1v out of the DAC. So 1v*10/(10+100) = 0.0909v which is not the expected 0.1v. This is what I mean... and same for voltage, especially if 12k/100k is used. For CV loop, R1/R4 is a direct division which is not like resistor divider. so R1/R4 = 10k/100k will mean a clean factor of 10.

Can you clarify exactly what technique should we use?

[VEGETA]

I tried using the full 2.44v dac voltage reference with a resistor divider for each loop. For current: 2.44*10/110 = 0.221 which is 2.21A maximum. So how can software know this?

16-bit DAC is 65536 bits which will have a function like this:

DAC_current_output = (65536 * Output_current_wanted) / 2.21;    // assuming 2.21A maximum current and very accurate and stable resistors.

As for voltage:

2.44v is scaled down to 20.33v using 12k/100k since here is not a resistor divider but a direct gain or 12k/100k:

DAC_voltage_output = (65536 * output_voltage) / 20.33;    // again, assuming accurate resistors.

___

So here software will have to scale the thing as well as having very accurate resistors to get say 1A with the calculated DAC bit value. This will add errors due to the scaling and parts... I don't think this is what you meant.

My idea was if I want 1A for CC I will output exactly 1V from the DAC, without scaling. Same for voltage too. However, if this method is used, you need to output something like 1.10v to get 1A and so on (not accurate as explained).

[Kleinstein]

As there will be tolerances in the resistors, it is normal that the DAC values would be calculated compensate for tolerances and also possibly for a not perfect fit with the nominal values. The resistor values only need to give approximate scaling, so that not too much (e.g. less than 10-20%) of the DAC/ADC range is lost.
So the the calculations are similar to the formulas shown. However terms like 65536/2.21 would be likely calculated up front - during calibration. In addition there would be correction for an offset.

This was a little different in the old times, with direct reading ADCs and direct output Resistor switches (e.g. KV dividers). Here they used trimmers to adjust the gain during calibration. However the modern ADCs / DACs are in a way that the resolution is higher than the accuracy and thus fine scale adjustment can be done in software without a significant disadvantage. The exact scaling factors are determined during calibration / adjustment for the individual units. So no more need to buy 0.1% resistors - just a good TK is a good idea.

Dividing down the current set point signal by a factor of 11 instead of 10 is not a problem, it actually helps. I don't think it is worth changing this even to a factor of 12 or 11.8.

[VEGETA]

As there will be tolerances in the resistors, it is normal that the DAC values would be calculated compensate for tolerances and also possibly for a not perfect fit with the nominal values. The resistor values only need to give approximate scaling, so that not too much (e.g. less than 10-20%) of the DAC/ADC range is lost.
So the the calculations are similar to the formulas shown. However terms like 65536/2.21 would be likely calculated up front - during calibration. In addition there would be correction for an offset.

This was a little different in the old times, with direct reading ADCs and direct output Resistor switches (e.g. KV dividers). Here they used trimmers to adjust the gain during calibration. However the modern ADCs / DACs are in a way that the resolution is higher than the accuracy and thus fine scale adjustment can be done in software without a significant disadvantage. The exact scaling factors are determined during calibration / adjustment for the individual units. So no more need to buy 0.1% resistors - just a good TK is a good idea.

Dividing down the current set point signal by a factor of 11 instead of 10 is not a problem, it actually helps. I don't think it is worth changing this even to a factor of 12 or 11.8.

So you say my method is correct?

We should use resistor dividers to each loop as seen, then do the scaling/calibration in software? this is what I said but didn't expect to be correct. It has sources of errors too.

I have a simpler solution that I would like to hear your opinion on it:

We have the CV voltage take the dac voltage directly (2.44v) so the full output is 24.4v which we won't use. While the current is the same except that it has an op-amp (one of the OP4170 with /10 gain) using 1k/10k (or 10k/100k) standard values (maybe 0.1% too if needed) to make the signal divided by 10. Here the DAC won't see a problem driving the effectively very high resistance op-amp input.

By this we can have better accuracy without scaling or software stuff involved, except for necessary stuff like offset voltage and so on.

An enhancement to this would be adding a resistor divider to the reference of the DAC via the REFO/REFI pins (it won't get in the loop = no resistance added!) to make it like this: 2.44 * (20k/100k) = 2.033 which is just perfect!! the 20k is two 10k (0.1%, low ppm) and one 100k (0.1%, low ppm) to make sure the 2.033 is stable enough.

So a final circuit will have CV voltage directly from DAC, CC voltage through a simple op-amp with /10 gain. The only drawback is if this is gonna affect stability or not? I mean the added op-amp. I tried it in LTSpice without problems.

My whole point was to remove work done for "individual units" that involves software.

what do you think? I think this is more cost effective than an external reference.

[Kleinstein]

Having extra gain in the CC loop can be a stability problem, but one can make it work. Using a divider for the set point current signal is still easier than the amplification, and it is the same resistor values.

The only alternative to using scaling in software would be adding trimmers and doing hardware adjustment. There are quite a few factors with errors, so that one can no rely on the DAC steps to directly correspond to something like 1 mV or 1/3 mV without an adjustment: it is the DAC reference, the DAC scaling factor, the dividers (DAC output for CC mode and feedback for CV) and the shunt. In addition there will be an offset. There is no good reason to replace software with old style hardware trimmers adjustment. There are already resistors than can be chosen for adjustment of current and voltage gain. So it is crazy adjusting the reference. Even if you would like to do the 1970's style analog trimming, one would adjust the resistors already in the circuit and not add an extra divider for the reference.
By lucky coincidence the resistors for coarse adjustment of gain are not even crazy values: they could be just 10 K and 100 K with the option to use 10K+2 K instead of 10 K to reduce the over-range.

Like with many modern DACs the DNL and INL is not that good, that an odd scaling factor would make a big difference. The extra rounding error (e.g. about +-0.15 mV for the voltage) is well below the uncertainty of the DAC anyway. One could even argue that the quantization error is already there from the offset anyway.

Avoiding trimmers also means less drift. Modern µCs usually have an internal EEPROM to store calibration values - so it is a simple software only solution, instead of 2 trimmers and low tolerance resistors.