LM324 Power Supply with variable voltage and current

[xavier60]

Try disconnecting R4 and check what effect it has on the ringing during a load transient test.

[floobydust]

I suspect there's too much gain, on both CV and CC.

[iMo]

Fyi - V15 stability plot with Vout=20V, 1k load, Icc set full.

[Kleinstein]

The loop gain plot looks good, though maybe a little high gain / unitiy gain transition at the upper edge of the good range.
So maybe a little smaller R30 to reduce the gain.

The R4, C4 part is kind of needed to get good stability even with nasty low ESR load.  It adds to the gain and thus the compensation for the rest would need to be slower than without it.

[xavier60]

The loop gain plot looks good, though maybe a little high gain / unitiy gain transition at the upper edge of the good range.
So maybe a little smaller R30 to reduce the gain.

The R4, C4 part is kind of needed to get good stability even with nasty low ESR load.  It adds to the gain and thus the compensation for the rest would need to be slower than without it.

I still want to see the result of a load transient test just without the R4,C4 RC. My project is quite happy without this RC.
What I did notice was increasing the equivalent of C1 in my project worsened the stability with the 470uF super low ESR capacitaor across the output. The C1 in my project is 150pF.

[iMo]

In simulation the whole stuff depends on the ESR of the output/load capacitors.
For example with the 47uF output capacitor with 0.5ohm ESR (in parallel 100n 0.05ohm) with R30=3k3 and C1=C5=100pF and none R4C4 you get a good result with 0.7Vpp overshoot ringing at 21Vout, ringing is rather small (transient test V15, none CLOAD).

[mike_mike]

Does anybody have a schematic that can be practically tested ?

[xavier60]

A few pages back I showed the result of a 2A load transient test which I regard as good.
Mine has a 47uF 500mΩ output capacitor also. The CV op-amp is compensated with a 10K and 150pF.
These values should be suitable for this thread's design also except maybe for some differences.
The different voltage divider that will add a bit more gain compared to mine.
The gm of the output path  is unknown. Mine is 10.

https://www.eevblog.com/forum/beginners/lm324-power-supply-with-variable-voltage-and-current/msg2405490/#msg2405490

[xavier60]

This is the recovery from a short circuit with the supply set to 5V and 2A.

BTW: The ramp up is due to the 2.0 Amps charging the output capacitor and not because of settling in the compensation components.

[iMo]

@MM: development of a perfect PSU is a hard work. Your design is almost identical with Xavier's.

I think you may use your PSU as-is.

You may also fine tune the C1, C5, C4 (or get rid of C4).

Fine-tuning (and the picture on your o'scope) depends on the actual parts used, wiring, decoupling, grounding, pcb layout, etc.

At this stage we can hardly write more about it, as the fine-tuning cannot be done from the other side of the planet.

[mike_mike]

I made some tests, with different C1, C5 and C4 values, and I used R30 = 4k7 (as it was in the V15 schematic).
I tried to reduce C1 and C5 values in order to make the power supply to oscillate.

1. Vout=1.21V ,SlowCC=3A ,Rload=0R (only resistive load) , C1=470p ,C5=470p ,C4=removed
0879-0883
2. Vout=26V ,SlowCC=3A ,Rload=0R (only resistive load), C1=470p ,C5=470p ,C4=removed
0884-0886
3. Vout= 26V ,SlowCC= 3A,Rload=0R (only resistive load), C1=100p ,C5=100p ,C4=removed
0887-0888
4. Vout=1.21V ,SlowCC=3A ,Rload=0R (only resistive load), C1=100p ,C5=100p ,C4=removed
0889-0891
5. Vout=1.21V ,SlowCC=3A ,Rload=0R (only resistive load), C1=100p ,C5=100p ,C4=4.7n
0892-0895
6. Vout=25.9V ,SlowCC=3A ,Rload=0R (only resistive load), C1=100p ,C5=100p ,C4=4.7n
0896-0900
7. Vout=1.48V ,SlowCC=3A ,Rload=1R (only resistive load), C1=100p ,C5=100p ,C4=4.7n
0901-0903

Please have a look at the attached screenshots and tell me what you think.

[mike_mike]

Is there any reason because the power supply did not oscillate when I reduced C1 and C5 capacitance ?
When I run the simulation with C1 and C5 = 100pF, then the simulation does not stop, it continues to run to infinite ...
Please also have a look at the previous reply and tell me what you think about the screenshots. Thank you.

Later Edit: I managed to simulate with 100pF for C1 and C5. It looks like the power supply oscillates. But in the practical montage I did not found any oscillation ... Should I reduce the capacitance for C1 and C5 ?
The used schematic is the one from V15.

[Kleinstein]

The simulation is only as good as the models are, and these are not perfect. Also parasitic effects like wire inductance and parasitic capacitance are not includes. The LM324 / LM358 has quite some cross over distortion (the rate drops a lot near current zero crossing as the output stage is class B with quite some gap) - not sure this is included in the models.

The simulation can do quite a lot, but only if the circuit is really like the plan.

One thing I would change from the pictures shown is to twist the wires to the power stage and also the wires to the raw voltage.  If not already there one may want to add some local decoupling on the board for the raw voltage.

For the beginning I would look at only the voltage loop, to use a larger load resistor (like 10 Ohms), so that the current limit does not engage. The point of very low output current is one of the more difficult ones, the turn off phase is essentially without a load. One may have to add some minimum load (e.g. some 5-10 mA).

[mike_mike]

I checked with a 10R max load at PSU Shorter and a minimum 820R load at PSU Shorter.
C4=4n7, R30=4k7.
1. Vout=1.98V , SlowCC= 3A, Rload=10R, C1=C5=100pF  -  it looks like with 100pF it oscillates.
0905, 0906
2. Vout=1.98V , SlowCC= 3A, Rload=10R, C1=C5=470pF
0907, 0908
3. Vout=1.98V , SlowCC= 3A, Rload=10R, C1=C5=1nF
0909, 0911

Please have a look at the attached screenshots and tell me what you think.

Please also find attached the schematic for the PSU Shorter.

[xavier60]

You should not be wasting time doing tests with C4 in circuit for now or ever.
C5 affects the CC loop only. The CC loop will be stable with a large range of values and only needs to be changed to set the settling time of the CC loop. Leave its value large and just check to see how long it takes for the CC loop to take control from the fast limiting.
 
Have a think about how to measure the gain or gm of the output path. Mine is 10

[xavier60]

From the test(DS0885.jpg) in Reply #360, the CV looks stable with C1=470p  ,C4=removed.
It's unstable with C1=100p, C4=removed. So looks like it might be happy with 150p or a bit larger.
It doesn't make sense to do further test with C4 in circuit with such a low value for R4, or at all.

PS: C4 was not the actual problem, rather the large amount of gain R4 added to the loop.

[mike_mike]

I disconnected R4 and C4 from the circuit.
I added C5=2n2 and C1=150pF. I hope I selected correctly those capacitors...
Please find attached the results:
1. Vout=1.98V ,SlowCC=3A ,Rload=10R
0914-0916
2. Vout=1.98V ,SlowCC=3A ,Rload=0R
0917-0918
3. Vout=26V ,SlowCC=3A ,Rload=0R
0919-0921
4. Vout=26V ,SlowCC=3A ,Rload=10R
0923-0927
5. Vout=2.08V, slowCC=3A, Rload=10R
0929-0932

Please have a look at the attached screenshots and tell me what you think.

[xavier60]

Although there are some things there I don't fully understand yet, I don't see anything that would be called bad.
The small overshoot after the dip when load is turned on should be fixed with an increase of C1, try 220pF.
The high frequency ringing in DS0927.jpg  should be just due to parasitics. Confirm by checking the waveform further away from the regulator's output.

More: The overshoot in DS0917.jpg isn't good.
A possible problem that I have just though of is when the short is removed while the fast limiting is still in control,  is likely to cause a large voltage overshoot.

[mike_mike]

More: The overshoot in DS0917.jpg isn't good.
A possible problem that I have just though of is when the short is removed while the fast limiting is still in control,  is likely to cause a large voltage overshoot.

Can this overshoot be reduced by reducing C5 ? If not, are there any possibilities to reduce this overshoot ?

[xavier60]

More: The overshoot in DS0917.jpg isn't good.
A possible problem that I have just though of is when the short is removed while the fast limiting is still in control,  is likely to cause a large voltage overshoot.

Can this overshoot be reduced by reducing C5 ? If not, are there any possibilities to reduce this overshoot ?

You need to confirm the reason first. Maybe by looking at the Base of Q1 at the same time. What was the duration of the applied short in DS0917.jpg ?

[xavier60]

I think that we could be seeing the recovery from the slow limiting. The 1.5V overshoot looks large in relation to the 2V set voltage.
The other possible problem with the fast limiting still should be checked.

[xavier60]

That rapid jump to 2.5V is caused by the current being suddenly diverted from the short to the output capacitor causing an immediate voltage drop across the capacitor's ESR. The rest of the overshoot is because the op-amp and output path transistors can only react so fast.

[iMo]

@MM: Simulation - here is the effect of the 3A SlowCC current diverted from the short to the 47uF output capacitor with ESR=0.5ohm.

RLOAD1=0.01, RLOAD2=820, Vout=2.1V, C1=220pF, C5=2n2

The current causes a 0.5*3A=1.5V voltage peak (red) at the capacitor's ESR resistor.

[mike_mike]

This mean that I should use a lower value capacitor instead of 47uF ?
Or this behaviour of the power supply is normal ?

[xavier60]

As expected, mine behaves the same except that the total overshoot is to 2.5V. Putting MLCC's across the output softens the initial rise but did't change the overshoot much. The lower overshoot voltage is likely due to the faster op-amp and power transistors.
I can't see how this behavior would be a problem in practical use.
Unloading while the fast limiting is active could be more serious.