With very few exceptions, a "CMOS" output pin always swings between VSS and VDD, with a Thevenin equivalent output resistance. The resistance is different in the high and low states (e.g., for 74HC and most microcontrollers, typically 70 ohms high, 40 ohms low), or you can use the average figure.
Resistance is relevant when you need to calculate how much load a pin can supply, for a given voltage drop.
TTL does not pull all the way to the rails, and its high and low states are more asymmetrical. Low is like 0.2V and 30 ohms, high is like 3.5V and 100 ohms (or more, I forget; I'm hand-waving here -- RTFDS for the actual curves).
TTL also has an off-center threshold, which is perfectly suitable for its output levels, but means 3.3V CMOS can drive it just fine.
5V TTL driving 3.3V CMOS may not be ideal, because it can potentially pull up higher than the 3.3V supply. A schottky clamp diode might be used to ensure the CMOS gates' input ESD diodes are not turned on. In turn, some series resistance (maybe 100 ohms) before the diode, to limit current, would be good. That's the most you'll ever need.
I don't really know what "LVCMOS" means, unless it's merely to distinguish 5V (and below) versions from CD4000/74C (metal gate, up to 18V) CMOS, which has much higher output resistance to go with its higher voltage rating (which makes it quite pitiful at 5V, by the way
). 3.3V most often seems to be "LVCMOS" but unless it's defined somewhere as otherwise, it seems to count for anything down there, usually 1.8 (74ABT, etc.) to 5V.
Tim