Is my math wrong, my scope off, or what's going on?

[LordGeir]

Hi all,
I have just upgraded from a very old oscilloscope, to a brand new Siglent SDS1104X-U

Everything has been a dream to set up and I'm very pleased, but I just created a simple function generator using an LM324N, and my match says I should expect ~frequency, but actual readings are off by several hundred Hz.

Oscillator schematic with calculations and component values:


PS! The LM324N is getting 9V from a bench power supply. Just didn't put it in the schematic.

Where am I going wrong here?

-GeirA

[tautech]

Hi all,

Where am I going wrong here?

Welcome to the forum.

You'll get no sense at all from any scope until you get its most powerful feature mastered, the trigger !
In both your screenshots you have a signal on ch1 yet the trigger assigned to ch3 !

To get started use the big blue button Auto Setup what should get you back on the right track.

[LordGeir]

Sorry, that's my bad; I forgot to write that in the post.

I had 3 channels connected, 1 = sq. wave, 2 = tri. wave, 3 = par. wave
Only channel 1 was viewed on the scope though.

I did the screenshots with the trigger set on 3, but after I removed the USB, I did of course change the trigger to 1, but the measurements were exactly the same, f = 1.02kHz

[MrAl]

Hi all,
I have just upgraded from a very old oscilloscope, to a brand new Siglent SDS1104X-U

Everything has been a dream to set up and I'm very pleased, but I just created a simple function generator using an LM324N, and my match says I should expect ~frequency, but actual readings are off by several hundred Hz.

Oscillator schematic with calculations and component values:


PS! The LM324N is getting 9V from a bench power supply. Just didn't put it in the schematic.

Where am I going wrong here?

-GeirA

Hello,

The LM324 one of my old favorites for general purpose work.
Yes there may be a problem with your measurement setup you could go over that.
As far as the circuit goes, there are also a few other things to consider to get a really good calculation.  For example, the saturation voltage of the output of the op amp and the max output voltage.  If you consider those things in the calculation you get a really good approximation.

However, there is one strikingly unusual thing about the circuit you show in the diagram.  There is no third resistor (like R3) from the junction of R1 and R2 to the positive power rail.  That's something you should really have for a couple reasons.  The first is more important though, you dont want to have to force the op amp to work all the way down to ground, you want it to work above ground even if it's just 0.5 volt.  If you are lucky, the op amp output saturation voltage will be above ground, but it's still pushing it. These op amps work down to ground but going that low is not a good idea, and also by not using that third resistor the stability with power supply variation will not be as good.  By setting the trip threshold points to 1/3 of Vcc and 2/3 of Vcc you get really good stability because if the power supply varies the frequency does not vary.  The math behind these circuits brings that idea out clearly and that 3rd resistor makes this possible, and that means measurements will be more stable and more repeatable also.

If you like we can go though some of the math behind this which will allow some good approximations and show how that third resistor  improves things.  It's very interesting to go through at least once.

[LordGeir]

However, there is one strikingly unusual thing about the circuit you show in the diagram.  There is no third resistor (like R3) from the junction of R1 and R2 to the positive power rail.
If you like we can go though some of the math behind this which will allow some good approximations and show how that third resistor  improves things.  It's very interesting to go through at least once.

It would be very interesting to learn more about an R3 at that junction!
If you have the time to write it out a bit; I'll be reading it over several times, to get the math right.

[tooki]

I had 3 channels connected, 1 = sq. wave, 2 = tri. wave, 3 = par. wave
Only channel 1 was viewed on the scope though.

Square wave, triangle wave, and what?

[LordGeir]

and what?

Parabolic wave

[Obin]

Did you check your exact component values? Depending on the tolerances, your frequency might already be different than what you calculated.
Also, your cursors might be a bit off, does the scope have a dedicated frequency measure function instead of deltaX?

The combination of both could very well be the cause.

Also, you could try to check out the probe test signal. If this is the clean x kHz signal (e.g. 5Vpp 1 kHz) your scope claims it to be, it could be your circuit.

PS: I put your values into Multisim and the frequency is pretty close at 1.61 kHz

[MikeK]

Many capacitors are 20% tolerance, which makes for about a 700Hz range in your calculations.  Also factor in the accuracy of your pot measurement.

[LordGeir]

Did you check your exact component values? Depending on the tolerances, your frequency might already be different than what you calculated.

I went back and double checked now, with two different meters.
R = 81k
C = 14.5nF (one meter measured 14nF and the other 15nF. So I used the avg. of 14.5 in this case.)
R1 = 100k
R2 = 21.8k

Plotting in the new values, it says to expect 0.85ms which is ~1176Hz
This is a lot closer to the measured cycle (0.97ms) and ƒ (1030Hz) deviance of 146Hz (~14%) well within tolerances. (Especially taking into considerations that this is a very old chip I've had forever. All other components are brand new.)

Also, your cursors might be a bit off, does the scope have a dedicated frequency measure function instead of deltaX?

Yes, it does. (Top right in image below.)
It wasn't showing in the first post, but that is the dedicated ƒ meter.

[MrAl]

However, there is one strikingly unusual thing about the circuit you show in the diagram.  There is no third resistor (like R3) from the junction of R1 and R2 to the positive power rail.
If you like we can go though some of the math behind this which will allow some good approximations and show how that third resistor  improves things.  It's very interesting to go through at least once.

It would be very interesting to learn more about an R3 at that junction!
If you have the time to write it out a bit; I'll be reading it over several times, to get the math right.

Hello again,

I am happy to hear you are interested in this.  This is what really makes electronics interesting and fun at times.
In the following, if anything doesnt make sense just let me know i'll try to clear it up.  Also, as others have noted, component tolerances can affect the final result especially the capacitor value.

We start with a capacitor being charged by a constant voltage source like Vcc:
Vc=Vcc*(1-e^(-t/RC))
(where RC=R*C throughout this writing)

but when the capacitor voltage Vc is non zero we have to include the initial voltage of that cap:
Vc(t)=(Vcc-Vc)*(1-e^(-t/RC))+Vc
where Vc is the initial voltage at t=0 and Vc(t) is the rising voltage of the cap.

Now since the output is driving RC we change that to:
Vc(t)=(Vout-Vc)*(1-e^(-t/RC))+Vc

and that is the expression for the inverting input which we will call 'vn':
vn=(Vout-Vc)*(1-e^(-t/RC))+Vc

Now the expresson for the non inverting terminal (we can call 'vp') just involves the static values of Vcc and Vout, and because there are then two sources (Vcc and Vout) we can use superposition to solve for the non inverting terminal voltage 'vp'.  To do this, we first calculate two combined resistor values R12 and R23 which are simply R1 and R2 in parallel and R2 and R3 in parallel, because that makes it simpler to calculate the solution using superposition. So we have:
R12=R1*R2/(R1+R2) R23=R2*R3/(R2+R3)

and now we can calculate the voltage due to each source Vcc or Vout.
Due to Vcc:
vp1=Vcc*R12/(R12+R3)

and due to Vout:
vp2=Vout*R23/(R23+R1)

and now the total voltage at the non inverting terminal is:
vp=vp1+vp2=Vcc*R12/(R12+R3)+Vout*R23/(R23+R1)

and expanding that with the values of R12 and R23 above we get:
vp=(Vout*R2*R3)/((R3+R2)*((R2*R3)/(R3+R2)+R1))+(Vcc*R1*R2)/((R2+R1)*(R3+(R1*R2)/(R2+R1)))

which simplifies to:
vp=(R2*(Vout*R3+Vcc*R1))/(R2*R3+R1*R3+R1*R2)

Now eventually we want to equate vp to vn as vp=vn as:
(Vout-Vc)*(1-e^(-t/RC))+Vc=(R2*(Vout*R3+Vcc*R1))/(R2*R3+R1*R3+R1*R2)

but since this includes the initial cap voltage Vc and there will be two such Vc, we should calculate those two Vc first.  The first Vc is when the output just goes high and Vc is lowest, and the second is when the output just goes low and Vc is highest.  Just before the output goes high the cap voltage is due to the voltage at the non inverting terminal vp and since the output was just low the output was zero and so the voltage at vp was:
vpL=(R2*(0*R3+Vcc*R1))/(R2*R3+R1*R3+R1*R2)
vpL=(Vcc*R1*R2)/(R2*R3+R1*R3+R1*R2)

so Vc with the output having been low is that:
VcL=(Vcc*R1*R2)/(R2*R3+R1*R3+R1*R2)

Just before the output goes low the cap voltage is due to the voltage at the non inverting terminal vp with the output high, so that is:
VcH=(R2*(Vcc*R3+Vcc*R1))/(R2*R3+R1*R3+R1*R2)


Now we can equate vn and vp and then replace Vc with the appropriate initial voltage but we will simplify the equation first:
(Vout-Vc)*(1-e^(-t/RC))+Vc=(R2*(Vout*R3+Vcc*R1))/(R2*R3+R1*R3+R1*R2)

and with some algebra and natural logs solving for 't' we end up with:
t=-log((R1*(Vout*R3+(Vout-Vcc)*R2))/((Vout-Vc)*((R2+R1)*R3+R1*R2)))*RC
(and log is the natural log function often denoted as "ln(x)").

Now when the output is high and cap charging Vout must be equal to Vcc (ideal case) and Vc must be equal to VcL so we have period low to high:
tpLH=-log((Vcc*R1*R3)/((Vcc-VcL)*((R2+R1)*R3+R1*R2)))*RC

and when the output is low and cap discharging Vout must be equal to zero (ideal case) and Vc must be equal to VcH so we have:
tpHL=-log((Vcc*R1*R2)/(VcH*((R2+R1)*R3+R1*R2)))*RC

Now we can simplify quite a bit.

Since we solved for VcL we can replace that in tpLH and get:
tpLH=-log(R1/(R2+R1))*RC

and samve for VcH so we can replace that in tpHL and get:
tpHL=-log(R1/(R3+R1))*RC


Adding the two time periods we get the total time period:
tp=-log(R1/(R3+R1))*RC-log(R1/(R2+R1))*RC

or in a different form:
tp=log(((R2+R1)*(R3+R1))/R1^2)*RC

or expanding logs we get:
tp=(log(R3+R1)+log(R2+R1)-2*log(R1))*RC

but now for the magic...

If we state that we shall make all three resistors R1, R2, R3 equal, that means that: R2=R1 and R3=R1, so we set those equal in the expression for tp and we get:
tp=log(4)*RC

and of course since log(4)=ln(4)=1.38629436111989 we end up with the final expression for tp:
tp=1.38629436111989*RC

and since f=1/tp we have (f in Hertz):
f=1/(1.38629436111989*RC)

or: f=0.72134752044448/RC

which can be approximated as: f=0.72/RC

or even just f=0.7/RC for simplicity.

So we went from a circuit with 5 components to an equation with just two components and a constant factor.  I dont think it gets any simpler than that.  This also means that we can change the timing by just changing R or C or both.

A couple things to note...

First, we assumed that when Vout goes high it is equal to Vcc.  That will not be the case except with a rail to rail op amp.  The calculation should be good enough though except in the most exacting applications.  This will get worse with lower supply voltages because then the max output vs Vcc is more different.  Also, we assumed that then Vout goes low it is equal to exactly zero.  That will also not be the case as there is always some saturation voltage.  We also assume that the op amp is ideal, and that is not the case either as there will be some slew rate and frequency response which limits the maximum frequency and squareness of the output wave shape.  If you do a simulation with f around 1kHz though you should get reasonable results anyway.  I am not sure you want to be bothered by these other issues though.

[LordGeir]

Hello again,

I am happy to hear you are interested in this.  This is what really makes electronics interesting and fun at times.
In the following, if anything doesnt make sense just let me know i'll try to clear it up.  Also, as others have noted, component tolerances can affect the final result especially the capacitor value.
[...]
A couple things to note...

First, we assumed that when Vout goes high it is equal to Vcc.  That will not be the case except with a rail to rail op amp.  The calculation should be good enough though except in the most exacting applications.  This will get worse with lower supply voltages because then the max output vs Vcc is more different.  Also, we assumed that then Vout goes low it is equal to exactly zero.  That will also not be the case as there is always some saturation voltage.  We also assume that the op amp is ideal, and that is not the case either as there will be some slew rate and frequency response which limits the maximum frequency and squareness of the output wave shape.  If you do a simulation with f around 1kHz though you should get reasonable results anyway.  I am not sure you want to be bothered by these other issues though.

OMG! Thank you so very much for this! 
I have read through it now, but I won't say I understand everything 100%, but everything makes perfect sense. (It's been well over 2 decades since I was given an introductory training and I haven't really used any of it since I switched to IT instead.)

Now I have bookmarked this post, and I will be reading it several times all while doing breadboarding to test everything at the same time.

[MrAl]

Hello again,

I am happy to hear you are interested in this.  This is what really makes electronics interesting and fun at times.
In the following, if anything doesnt make sense just let me know i'll try to clear it up.  Also, as others have noted, component tolerances can affect the final result especially the capacitor value.
[...]
A couple things to note...

First, we assumed that when Vout goes high it is equal to Vcc.  That will not be the case except with a rail to rail op amp.  The calculation should be good enough though except in the most exacting applications.  This will get worse with lower supply voltages because then the max output vs Vcc is more different.  Also, we assumed that then Vout goes low it is equal to exactly zero.  That will also not be the case as there is always some saturation voltage.  We also assume that the op amp is ideal, and that is not the case either as there will be some slew rate and frequency response which limits the maximum frequency and squareness of the output wave shape.  If you do a simulation with f around 1kHz though you should get reasonable results anyway.  I am not sure you want to be bothered by these other issues though.

OMG! Thank you so very much for this! 
I have read through it now, but I won't say I understand everything 100%, but everything makes perfect sense. (It's been well over 2 decades since I was given an introductory training and I haven't really used any of it since I switched to IT instead.)

Now I have bookmarked this post, and I will be reading it several times all while doing breadboarding to test everything at the same time.

Hi,

Oh you are welcome. I actually appreciate seeing that other people are into circuit analysis.

It really come from the magic of Nodal Analysis.  I always suggest to people interested in this stuff to study Nodal Analysis because it is so versatile and provides nearly all the answers we could ever ever ask about a circuit, and it covers nearly every circuit in one way or another.  It doesnt take too much to learn if you have a decent math background especially algebra ... you can go a long way with just algebra.  If you have a little calculus you can analyze almost every circuit and find answers that you cant get from a simulator, although a simulator is a great tool also and should always be used to check math results.

I did forget to mention that including the saturation voltages of the upper and lower transistors at the output of the op amp is not too much more trouble.  Instead of replacing Vout with either Vcc or zero (volts) just replace Vout with Vcc-Vsat or instead of zero use some small voltage like 0.1 volts.  It makes about 1 percent difference with a supply of 10 volts but with lower voltage supplies it would be more significant.

If anything doesnt make sense let me know.