Application test question - wheatstone bridge

[Rainwater]

So im tryin to get my first EE job, had the interview last week, then a test today.
No books, phones, or calculator and Just some graphing paper and a pen and 3 hours
One of the questions really peaked my interest.

I do not have any idea if my solution was good or bad
when i got home, i simulated it and it works

I can't remember it word for word, but here it goes

design and implement a pt1000, low noise, adc frontend with an output voltage of +2.5v at zero c and a resolution of 5mv per degree C

So the pt1000 was easy, 1000 ohms at zero celsius, but i forgot the coefficient.
One unknown value is not going to delay me. I'll have some kinda adjustments to work out the resolution after its finished.
To minimize out the noise I believe that I will need a differential pair.

So i gave myself a few moments,  and a wheatstone bridge seams to fit most of these requirements nicely.
Its differential, and I can use a 4 wire cable.
One pair for the pt1000 and another with a zero ohm resistor.
This will correct for the resistance of the wire,
while absorbing the same interference as the sensor into both pairs, and removing it.

Ok now to spec some values,
i dont want to push too much power through the pt1000 or self heating will be a problem.
1mw seams like a nice number.
5v Vcc was spec'ed
I setup the bridge with a 3:1 ratio to help improve resolution

But forgot the bridge voltage difference formula. So im not sure what my resolution will be

Not gonna stop me.

Stright into a differential amplifier.
Orientation of the opamps, check.
All resistors equal, check.
Add a pot to adjust the gain of the output, good.
Add a pot to the reference leg of the bridge for calibration.
And finish it off with a dc offset of half of Vcc 2.5 volts.
Look at the clock, 2:45 left.

The rest of the test was a just textbook questions, some parrallel resistors, a few rc time constants, copple of opamp questions.
Back to basics stuff not requiring any real thought.

Im seeking honest feedback, 
i really want this job, im a few years away from a degree
In your opinion, how did i do?
https://everycircuit.com/circuit/5386779221557248

[PGPG]

Asking to design anything with PT1000 and not giving its datasheet reflects badly on the authors of the task (may be they expected to be asked for it).
Designing anything without access to ICs datasheets can't work.

I have zero experience with precision analog measurement circuits. Assuming that schematic you show here is what you designed during test I can have some notes to it.
But don't worry. Probably not many people your age would pay attention to such things.

1. Why there are no supply blocking capacitors at your schematic? Remember forever - whenever you will have some unclear behavior of electronic systems first check if at supply you have right capacitors and if they are placed correctly.
2. If it is front-end to A/D converter than after it there is probably some digital circuits powered from this 5V. Digital circuits inject noise into their supply and you were asked to make your design low noise. You should write something about may be need for separate supply or use C-L-C filtering between +5V coming to your circuit and your ICs supply and then may be next filter between your circuit supply and PT1000 bridge supply.
3. In simulation you write 4.7k and resistor has 4700.000Ω. But in real live you should specify how accurate resistors should be used in your design and what accuracy you will get with them.
4. Why you build instrumentation amplifier from discrete OpAmps? I have never used instrumentation amplifier, but suppose that resistors in such ICs can be more equal to each other than you can reach using discrete resistors (I would expect them being laser trimmed during production). I don't expect in real measurement circuit OpAms being used to make instrumentation amplifier (but I have never seen any real such circuit).
5. Selecting the right instrumentation amplifier would be probably one of most important tasks. At your place I would write some words that what is to be done is to find such amplifier. When I have written in Mouser search box "Instrumentation amplifier" first I got is TI: INA849, but it needs minimum 8V supply so searching should go on.
6. I don't think PT1000 is located just near amplifier. So there have to be some connection cable. Most noise is common mode. At 4 wire connection common noise in theory cancels. But I'd suppose (have no knowledge about it) that with frequency higher then instrumentation amplifier bandwidth even coming to both inputs as common mode it could be not canceled but may be even detected and giving some error in output. I think you should think about filtering common mode noise. I don't know if at such measurement circuits inputs common mode chokes are used but it seems being very probable. It should probably be 4 coils common mode choke.

Once more. Don't stress too much about what I wrote.

[Rainwater]

Asking to design anything with PT1000 and not giving its datasheet reflects badly on the authors of the task (may be they expected to be asked for it
Designing anything without access to ICs datasheets can't work.
.....
1. Why there are no supply blocking capacitors at your schematic?
....
3. .... But in real live you should specify how accurate resistors should be used in your design and what accuracy you will get with them.
4. Why you build instrumentation amplifier from discrete OpAmps?
....
6. I don't think PT1000 is located just near amplifier. So there have to be some connection cable. Most noise is common mode.
...
that with frequency higher then instrumentation amplifier bandwidth even coming to both inputs as common mode it could be not canceled but may be even detected and giving some error in output. I think you should think about filtering common mode noise. .

Once more. Don't stress too much about what I wrote.

I should have mentioned that this job is for a company that has an inhouse asic department and the position is related to that.

I think that this question is an opportunity to demonstrate ones abilities and foundational knowledge.
Not being provided with datasheets when being asked to use a very basic component does not seem unreasonable to me

Comment #1,2,3 Those are seriously good points.
I was trying to be quick and assuming ideal conditions for the first draft of the design.
I was more focused on the basic operation of the circuit than the non-ideal aspects like component tolerances.
I was trying to use the basic opamp building blocks to get the signal in the correct configuration and then work out the biasing  networks last.
I even made a bad connection in the last opamp, improperly adding the dc offset. My intent was to make a summing amplifer, but my result was adding linear feedback into the inverting terminal I am completely throwing off my accuracy as i move away from 0c

Comment 6.
This is why i used a wheatstone bridge. I did include a note that a 4wire cable should be used. The "zero point reference"(left resistors of the bridge) should be connected through it. This is not represented properly in the schematic i posted here. The schematic I turned contained a drawing, showing the connections and zero ohm resistor.
I did not consider needing a low pass filter on the cabling. This is an excellent idea.

Good news, i made it into the round 2 interviews.
Thank you for your comments. They are appreciated more than I can properly express

Rev2 of the above schematic with proper resistor values and the corrected output stage is attached
It works perty good using discrete components and a dummy load.
That's a 324 quad opamp.
Im thinking about altering this circuit to output a current source and then using the last opamp on my package to charge/discharge a capacitor and create a pulse density output for one of my fpga projects

Edit: spellcheck

[PGPG]

Not being provided with datasheets when being asked to use a very basic component does not seam unreasonable to me

If you had PT1000 coefficient you could count exact resistors for your circuit.

I even made a bad connection in the last opamp,

Intuition told me: 'something is probably wrong here', but I was writing about 2 am here and it was time to bed and not to thinking.

I did not consider needing a low pass filter on the cabling. This is an excellent idea.

I didn't clearly written about low pass filter at input (just something around). I was waiting to see if you will get that idea. Congratulations
PT1000 rather not gives you high frequency signal to be measured so using simple RC you can cut input bandwidth at very low frequency.
Common mode choke is useful when you have to filter common mode but not differential mode. But as you don't need high differential mode bandwidth you can filter (RC) both modes. I suppose you need not CM choke here.

Good news, i made it into the round 2 interviews.

Let us (me) know the end result.

[wasedadoc]

Hope good spelling and punctuation are not high on their requirements!

[Rainwater]

Hope good spelling and punctuation are not high on their requirements!

Thankfully they are not, as I have accepted the position and soon will be an entry level ASIC developer.

In lieu of any notable ability for proper spelling or grammar, I would like to present a detailed analysis of the circuit previously described in exchange for aid rendered.
Grammarly was used to alter my thick southeastern American accent into something more palatable. And wolfram alpha helped solve the final R₄ equations.

    This is the same circuit as before but drawn and labeled in a manner that may make it easier to describe in pleasant conversation. I will be focusing on the KCL/KVL derived equations, paying special attention to the details that explain the undesired behavior I witnessed when building this circuit on the breadboard. The overall functionality of the circuit is to convert an unknown resistance to a voltage in preparation for analysis using a fpga. I have the desire to include this design in my toolbox, ready to be configured and implemented at a moments notice. This requires a detailed understanding of the biasing resistors to guarantee stable and valid operation.

    The unit under test in this example will be a PT1000 class B, with a maximum V_s=15v, and P_D=25mW or less to minimize self heating effects. Non-linearity of the unit under test is not a concern at the moment, merely obtaining the most accurate resistance measurement I can while quantifying error and noise to a known value. I wish to be able to study the effects of component tolerance on common mode noise rejection and output error. Before I can do any of that, I must first arrive at an ideal circuit that will meet specifications.

_{I have not completely error checked the math yet, so please point out any errors you find.}
Wheatstone Bridge Maths for Voltage Source
The values given are R₁,R₂,R₃,V_a, and V_wb
$$V_{wb}=V_C-V_D \quad,\quad I_{R_1}=\frac{V_A}{R_1+R_2}\quad,\quad V_{R_1}=I_{R_1}R_1$$
$$I_{R_2}=I_{R_1}\quad,\quad V_{R_2}=I_{R_2}R_2 \quad,\quad V_C=V_{R_2}$$
$$V_{R_4}=V_C-V_{wb}\quad,\quad V_{R_3}=V_A-V_{R_4}$$
$$I_{R_3}=\frac{V_{R_3}}{R_3}\quad,\quad I_{R_4}=I_{R_3} \quad,\quad R_4=\frac{V_{R_4}}{I_{R_4}}$$
Combining all of the above terms gives the following solution to solve for R4
$$R_4=\frac{\frac{V_A}{R_1+R_2}R_2-V_{wb}}{(\frac{V_A-(\frac{V_A}{R_1+R_2}R_2-V_{wb})}{R_3})}$$

This method works, and is the logical pathway I used to solve for R4. But this circuit simply does not meet the requirements as specified.
Ultimately this line of logic is flawed due to the voltage drop equation being a unbalanced proportion. As the impedance of the two legs of the bridge grow further apart, the volts per ohm difference increases. With the bridges configured for the most accurate reading at zero0 C, the minimum difference of the difference ranges across 2.84x10^-5
$$ V_{drop}=\frac{R}{R_{total}}*Vcc$$
After a lot of thought, I want to revert to my original though and use a current source to feed the bridge and create a more linear response based on
$$ V_{drop}=I*R$$

Wheatstone bridge with current source
$$I_{R_1,R_2} = \frac{R_3+R_4}{R_1+R_2+R_3+R_4} * I_t\quad,\quad I_{R_3,R_4} = \frac{R_1+R_2}{R_1+R_2+R_3+R_4} * I_t$$
$$ V_C=I_{r_2}R_2 \quad,\quad V_D=I_{R_4}R_4 $$
$$ R_4 = \frac{R_2(R_3I_t-V_{wb})-V_{wb}(R_1+R_3)}{R_1I_t+V_{wb}} $$



Using a spreadsheet to generate charts which compare the two wheatstone bridge's V_wb. the results are very promising.
With the bridges configured for the most accurate reading at zero0 C, the minimum difference of the difference ranges across 7.67x10^-6
that looks like a 369.75% increase in linearity.
Factoring in that I am not a math expert, I would like to request a second opinion on these figures.
(ok. take a break from the ai speak, I typed in "I dont know what im doing here, What yall think about that", that^^^ is what was spat out. AI has its uses)

First is the difference between V_wb per change in the PT1000 across its entire valid range of -50c~550c or 807.5~2925ohms

And the last is the difference, in the difference between V_wb per ohm of change. This chart directly shows the non-linear errors

By using a constant current source to feed the wheatstone bridge, the linear operation has increased by an order of magnitude, bringing the non-linear error to less than that generated by component tolerance.

Non-ideal effects which have prevented proper operation of the circuit include
V_C or V_D falling below or above the Output Voltage limits of my device at current Vcc (LM324A @ +5v )
The same can occur across resistor R₅ per the following formula, in which the input buffers are not able to apply the needed voltages to balance the inverting and non-inverting inputs due to ether the gain of the input stage or the output voltage limits.
$$V_{wb} * (1+\frac{2R_6}{R_5}) >= Vcc *\frac{R_5}{2R_6}$$

ToDo:
Model noise sources,
Component tolerances error calculations
Low pass filters
the next 500 pages of Op amps for Everyone