How many PCB prototypes does your company allow in hardware design?

[electronx]

How many PCB prototypes does your company allow in hardware design?
Some prototype PCB's are expensive. I worked PCBs worth 1000 dollars (10 layers of blind via and impedance equalization, etc.).
What is expected from me is that the PCB works in the first design, if there is any mistake I get a ton of mobbing. How is it at the company you work for?When I want a second prototype, and I get suggestions like "it should work on the first design". Is this normal?
Especially when designing analog circuits, spice models can include simulation times of 7-8 hours (Cascade circuits).

Divide and conquer spice simulations are partially faster. However, it can be difficult to predict what will happen in "cascade circuits". The simulation provides results to some extent.

For example, in the data sheet of an opamp, everything such as chopper noise results etc. can be included and noise analysis can be done. However, sometimes there may be unexpected noise. (Meanwhile, I am reading technical books and making designs to broaden my perspective and learn more topology sub-topics.)

Analog digital circuit topology design , power design, analog and power spice simulations , PCB place and route, high speed ddr electromagnetic simulations, power integrity ,syz parameters, signal integrity, decoupling cap optimiazation, impedance analyses), all of them I analyze it myself.But there are still points I miss.
I also have to test  pcb , time domain oscilloscope, vna for pdn impedance etc and SA analysis for active filter characteristics.

What about your experience?

[mikeselectricstuff]

For a PCB of that complexity, expecting everything to be perfect first time is unrealistic, and that should be reflected in the development timeline and budget. 
It is common for a first prototype to add additional test points/signal breakouts, links to allow signals/power rails to be broken, and other functionality to make validation easier - that alone should cover the cost in time saved.
It's also pretty common for revisions to be needed to address specs that have changed since the first prototype.

[AndyC_772]

When I want a second prototype, and I get suggestions like "it should work on the first design". Is this normal?

It's normal if, and only if, the people you're working with are morons.

Designing a new PCB for the first time is an incredibly complex undertaking, especially the type of board you're describing. Expecting it to work on the first revision is just a way for your colleagues to express the fact that they have no idea what the design process involves, or what the uncertainties are.

As a concrete example... a while back I designed a board that used an RS485 transceiver. The data sheet explicitly stated that the output is guaranteed to be logic 1 when the bus isn't driven externally, which is a very common state in a multi master system.

"GUARANTEED"

Turns out that's not the case; if the bus isn't driven it's instead highly sensitive to external noise. The amount of noise picked up depends on the enclosure, wiring, and other factors that aren't even part of the PCB.

I humbly contest that there is no possible way that particular PCB could have been perfect, production ready on rev A. There is always a process involving building a prototype, testing it, fixing the bugs, then issuing rev B.

Rev B is usually production ready. Unless the goalposts have moved, in which case it might be rev C, or D, or E, but that's not the fault of the engineer either.

[PGPG]

As a concrete example... a while back I designed a board that used an RS485 transceiver. The data sheet explicitly stated that the output is guaranteed to be logic 1 when the bus isn't driven externally, which is a very common state in a multi master system.

Do you remember the exact RS485 transceiver symbol?

[electronx]

A similar situation occurred with the RS232 transceiver. It was claimed that pull up resistors (through the IC die) were connected when it was idle. However, when the serial numbers changed, it was understood that there was no pull up resistor inside. In this case, when the power came on, the RS232 was sending a noisy symbol to the output.

[perieanuo]

hi, in places i worked usually Rev D to F even H were clear winners. and it was micro/dsp usual automation boards at some low frequencies, not very high grade of complexity, smart step/brushless motor drivers, automations for machining (ie, pin insertion automated machine with display, up to 32 motors controlled on rs485 or wifi-enabled with incorporated trajectory control like speed, acceleration etc). so nothing top-notch... let's say Rev C was stable for production and later revs better and with other client new ideas (well, client have always new ideas after you do his stuff)
br

[Psi]

Obviously it varies a lot with pcb size and complexity.
But 3 to 9 is normal for the stuff I work on, with most projects becoming mature around 4-6.
Throw some high speed signals/FPGAs in the mix and watch your revision count go up.

Sometimes you need many PCB changes that are totally unrelated to electronics. Mechanical changes affecting pcb outline for example.

[coppercone2]

fuck those people that think its possible to get it right on the first time its like thinking your team is sure to win a basketball game, its ridiculous

It means they have a understanding through too many layers of abstraction and assumptions and they simulated a bogus ass representation of your work effort that has their desired outcome. i think the internet calls this an armchair tactician



Maybe a passive interconnect has a good chance of working on the first revision. more then likely there will be some issue related to manufacturing that means it always stand a 2nd version.



I present to you, the interconnect industry. They have to make a object out of sheet metal, a simple conductor that is one part. How long does it take them to design a new crimp? The equivalent circuit is literally this "    -     ". And it takes years. Actually electrical engineers can't even see it in their dimension. Its something that manifests itself when a design comes into the real world.

[CaptDon]

Management never has time to do it right, but spends years "Doing it over" and somehow they think they are winning? Management says "We have to be the first in the marketplace". A customer will remember what a worthless piece of shit your product was for a much longer time than they will remember something that was plug and play perfect. As for the software/human interface......So much software (client or operator interface) is written by and for software folks and is completely un-intuitive to the final user!! Operation should flow and be intuitive!! As for rev numbers, I worked with a power supply designer who's designs were so flawed he didn't even assign rev numbers or letters!!!! The final marketable product was always assigned Rev. A and rev 'A' was usually about his 5th try. It was impossible to know what version we were validating. Thank God he moved along!!! Our company usually goes to market with 'pile of shit Rev. B' and by the time we release Rev. D it is 'almost' on target. Or should that word be 'tarGEt?

[AndyC_772]

Do you remember the exact RS485 transceiver symbol?

Sure do. From the data sheet:

"The LTC2854/LTC2855 have a failsafe feature that guarantees
the receiver output to be in a logic-high state when
the inputs are either shorted, left open, or terminated
(externally or internally), but not driven. This failsafe feature
is guaranteed to work for inputs spanning the entire
common mode range of –7V to +12V."

I think the issue was a sensitivity to power supply noise when the bus was correctly terminated at both ends, but not actively driven.

[tszaboo]

I usually go with 2 or 3, depending on how complex the project is.
Often times we want a prototype which is good to start programming, and the certification part (which is 80% of the work in my case) is done later. It also went to 5 or 6 prototypes for other engineers, they still work here.

[PGPG]

Sure do. From the data sheet:

I asked because when used by us transceiver (SN65HVD72D) was absolutely unavailable I selected close replacements:
- LTC2862IS8-2 (higher supply current what I don't like as I have linear regulator from up to 24V down to 3V3),
- MAX3072EESA+ (internal protection working at -8/+13V while my protection is designed for -13/+16.5 from HVD72D).
I wanted to know if it is not one of them.

And regarding the thread question.
Designed by me PCBs we order at once a production serie.
But these are simple designs (not long ago it were only 2 layer PCBs) and our production series are rather small (around 100) so if it comes to making hand corrections it can be tolerated.

[mawyatt]

Try chip design!!!

Revisions here are extremely expensive and career limiting!!

Best,

[rich t]

> What about your experience?

There can be no one-size-fits-all rule.

IMO, the best approach is if you want to spin, have a full peer review and understand what went wrong the first time.

And then assess whether it is reasonable or not -- and implement changes so unreasonable spins can't happen again!

Some spins are totally unreasonable and should have been caught before PCB -- the typical one I think of is a component layout issue -- always print your PCB on paper and put all the parts on it!

Other spins are less unavoidable -- things you have to measure in real-life -- I had power supply noise from the MCU VUSB3V3 show up in an analog circuit, and the only way to avoid it was a routing change.

[electronx]

I have approximately 1.5 years of experience. Before that, I did an embedded system internship for 2 years (while I was at university). I do not start PCB design without doing spice simulations in the analog and power parts. At the same time, if I have a high-speed signal on the PCB, I use pdn and si simulations.I think there is something causing flicker noise in my last design. It was a signal conditioner and they  want  that  design it in 3 weeks.

[electronx]

Try chip design!!!

Revisions here are extremely expensive and career limiting!!

Best,

I guess my heart can't stand it

[Kleinstein]

With modern EDAs and afordable small scale production PCB redesigns are not that dramatic anymore. Even $1000 for an expensive multilayer PCB hardly pay for 1 week of the PCB designer.  It still helps to not make too many iterations - how many depends a lot on the type. There can also be added costs to a design, like EMI testing if the design nearly works.

[mikeselectricstuff]

On the flip side, if you know it is certain that there will be changes after the first proto, it doesn't make sense to spend too much time getting it as perfect as possible, as it will generally be quicker and easier to discover what needs changing once you have a board in front of you.
Also often means the software can be progressed sooner.

[coromonadalix]

normally under 2 or 3 pcb's

the failure often come from pressure, thought processes, product evaluation needs, too many people buzzing around you  loll
and some failures come from the way you read and interpret schematics /symbols as mentioned earlier

take you time to sit and evaluate, check re-check, and re-re check,  and if all is done correctly you can get a 1st spin correct UNLESS the board maker mess things up (happened)

One of our design was perfect  12 layers (mostly ground and supply lines),  but the board maker mirrored a system on module (ZynQ based SOM 2x 100 pins headers)   we had to create a sub board to invert their mistake  ....

a small pcb with 4 x 100 pins connectors, 10 layers a mere 200$ extra    the carrier cost 800$  loll

[G0HZU]

It can be realistic to demand a 'right first time' design process. For those who don't agree, maybe look up what UOR means.

I've had to work on projects like this in the past, where the first batch of boards 'is' the first production run for the customer.

This applies to every PCB in the system so there might be a dozen different boards covering PSU, digital, RF Rx and RF Tx, and I/O.  All are designed to be right first time and all have to be used in the first production run because there is no time allowed for a second attempt at the PCB design.

This usually involves 8 to 12 layer boards with FR4 core and Rogers outer layers with expensive via options each costing more than the budget in the first post.

To achieve success, this requires exotic CAD tools and a fairly large and experienced design team with lots of peer reviewing, and formal design reviewing. It is possible to get really close to a perfect design if you use the right CAD tools to model everything and produce a virtual system before you commit to real hardware. The downside is that it requires a lot of resources and lots of funding to do it.

Nearly always a component value will change or a pullup resistor will have to be tacked on somewhere, but the original PCBs absolutely 'must' be good enough for the first production run.

In all my years, I've only had to do this UOR thing twice and both times the original boards were used for the first production run of the first batch of systems. Any second ops mods were minor, such as component value changes or the odd pullup or shunt cap was added.

[rfclown]

My employer's business model ideally has the customer funding the development and making of the first items. The schedule is made with wishful thinking that the first board can be made to work. We will go through heroic efforts to make the first items work without a board re-spin, because it isn't in the budget or schedule. The time frame from product kick-off meeting to first item tested with customer and everything set in our system so that the customer can then order more is usually one year. One electrical and one mechanical engineer. It's pretty crazy. If a re-spin is needed, no one gets yelled at. This is small quantity stuff (<100 per year). Can be complex with high speed digital and RF. We usually farm out the simulation of high speed digital stuff like DDR and xx GHz ethernet.

Interesting idea of printing out the board on paper and putting the parts on it. The problem I see with that is that if I sneeze the hundreds of 0201 components will fly everywhere. (to be honest, I can mostly use 0402, my preferred size for stuff <3 GHz).

[Psi]

You can spend an extra week or two thoroughly checking over the PCB for any issues before sending it out for fab.  Or you can send it out 1-2 weeks early with only a casual check over. Then you can get started on the development 1-2 weeks early because your boards arrive 1-2 weeks early from the time you saved.
If there's a PCB issue you can quickly make a change to fix it in an hour and send a new revision to the fab that day, while continuing to test on the current board and simply working around the issue it has.

The net result, it's often cheaper overall to NOT try to get it right first time.
The engineers time in $$ spent thoroughly checking the design is usually more than the cost of a respin or two.

It's also often cheaper and faster to just order the raw PCBs plus do a digikey parts order so you can populate the PCBs yourself. It might take a full day or two to hand populate a few boards, but I guarantee it will take longer than that to organize PCBA, wait for the fab to get the parts and then populate and ship the boards to you. Just getting some black PCBs and a stencil is super fast.

[CaptDon]

Saying it's 'kind of o.k.' so let's push out the first PCB design a couple weeks early is total B.S. What if the board simply refuses to boot up at all or power supply wiring is in error (SMPS with the MOSFET footprint inverted, we had that happen with a rush job and destroyed some VERY valuable parts) or you can't even get the JTAG to work correctly? Maybe some smaller stuff with a total landed cost of under $1000.00 per board but we were doing systems where the total landed cost per board was over $3000.00 and usually you will purchase 2 to 5 of those boards to distribute to the hardware and software test/verification/QA QC departments. You are looking at the potential of $6K to even $30K of useless junk if you skip the extra week of peer review steps. (Assuming your company even has any 'qualified peers' to do a review). We were extremely anal in our first spins and still had to do at least one re-spin. The second spin usually was marketable with one or two hand placed kludges added. In multi layer boards you can't probe the sub-terrainian signals so troubleshooting a dead or non-functional first spin with routing mistakes may be impossible!! Spend an extra week reviewing your routing. it's worth the labor cost!

[tszaboo]

Saying it's 'kind of o.k.' so let's push out the first PCB design a couple weeks early is total B.S. What if the board simply refuses to boot up at all or power supply wiring is in error (SMPS with the MOSFET footprint inverted, we had that happen with a rush job and destroyed some VERY valuable parts) or you can't even get the JTAG to work correctly?

Then you desolder the power supply and connect a lab supply in it's place.
If your JTAG doesn't work, you take a scalpel, cut the traces and wire it to a connector.
If it doesn't fit into the enclosure, than you take a dremel to the enclosure or your PCB.
These are issues that can be solved easily if you have experienced people working on a project. if you search this forum, you will find dead bug manually wired FGPAs upside down. It's just the question of determination.

I even ordered PCBs that had zero components on them, just to be able to test fit it into an enclosure. it only had the connectors, place where the potting compound goes and nothing else.
The only reason not to order early prototypes is money, and if a company cannot afford prototypes, I think it's time to look for a job somewhere else, because they will take this minimalist spending mentality to places that will affect your life in a bad way.

[Psi]

Yep, i agree with tszaboo.

You work around the issue any way you can. You only have to do so for a week or two until the new board revision arrives.
There is usually a mountain of things that need to be checked/tested, often sub-circuits that don't even need the main MCU to be functional.

Obviously there is some common sense to be applied here and some exceptions depending on the board complexity and if it has expensive parts that cannot easily be moved to a new PCB.  You can reball and move most BGAs with some skill, but obviously if you're working with a $50,000 ASIC sample you are going to spend as much time as needed to fully check the PCB design.

The first revision needs to have a good chance of working well enough to continue development taking into account the costs involved.
No-one is suggesting wasting money, we are suggesting saving money by not wasting time aiming for perfection right out of the gate.

There are definitely situations where things should be made to work first time. They are just the exception and not the norm.