Fall time from digital pot results in brief negative voltage. Why?

[akschu]

I have the following circuit.

When I use code to command the digital pot to swing from full up to full down, it does it in around 2ns which is pretty dang fast.  I then see overshoot and the voltage goes negative for 20ns.  I don't understand why.  What is the source of this negative potential?

I put a 4.7uf cap between ground and wiper and that slows the fall time to around 1ms which seems to avoid the negative voltage, is this a reasonable solution?

Unfortunately I don't know what I don't know and I've not been able to find anything on the web that explains this probably because I don't know the correct terms to search for.  Any hints or links to further study would be much appreciated.

Thanks

[akschu]

I should have added a link to my micro:

https://www.rugged-circuits.com/microcontroller-boards/ruggeduino-smalls-ym497

There is a switching regulator on board, so I'm powering through Vin and the switching regulator is dropping that to 4.7.  I tried powering it with 9v and letting the regulator go to 5v and it does the exact same thing.

Edit: link to digipot datasheet:
https://www.analog.com/media/en/technical-documentation/data-sheets/ad5245.pdf

[tggzzz]

Show us a photo of the circuit and how the scope is connected.

Solderless bread boards with long wires are a traditional problem: each wire comes with a free 1nH/mm inductor.

If using a scope probe with a 150km 150mm ground lead, that will resonate with the probe tip at around 100MHz.

[akschu]

It's exactly what you would expect.

So, the wires are acting like inductors?  What is a 150km lead?  I'm not sure I've heard of KM.

Thanks for the help.

[akschu]

So, I got the ground lead down to 30mm to the B terminal of the digipot and connected the probe directly to the wiper pin and now see this:

That's much better.

Question:  If this wiper pin was connected to a micro controller, could that sudden negative voltage harm it?  If I needed a long length of wire between the two and response time wasn't an issue, would using a cap to slow this to 1ms make sense?

[tggzzz]

It's exactly what you would expect.

So, the wires are acting like inductors?  What is a 150km lead?  I'm not sure I've heard of KM.

Thanks for the help.

Oops! Corrected to 150mm I blame my tablet's autocorrupt, and my not spotting it.

There are many prototyping techniques, so "exactly what you would expect" doesn't convey any information. See https://entertaininghacks.wordpress.com/2020/07/22/prototyping-circuits-easy-cheap-fast-reliable-techniques/quote

For one example how probing technique can affect measurements, see https://entertaininghacks.wordpress.com/2015/04/23/scope-probe-accessory-improves-signal-fidelity/ FFI see references in https://entertaininghacks.wordpress.com/library-2/scope-probe-reference-material/

You should also ensure all parts of the circuit are properly decoupled.

[tggzzz]

Question:  If this wiper pin was connected to a micro controller, could that sudden negative voltage harm it?  If I needed a long length of wire between the two and response time wasn't an issue, would using a cap to slow this to 1ms make sense?

Good to see improved technique

Spike voltages can damage circuits and/or cause intermittent failure. But they can also be measurement artefacts.

Contrary to popular supposition, digital ICs are actually analogue components that interpret the analogue input waveforms as digital signals. If the analogue inputs deviate from the specifications, all bets are off. That is the basis of the sub-discipline of "signal integrity" .

[the_cake_is_a_lie]

Overshoot and undershoot are two sides of the same coin. No reason why the undershoot can't be negative. You can generate voltage spikes with a capacitor or parasitic capacitance + a switching action, which is basically what you're doing by adjusting the digital pot in discrete steps.

The 4.7uF cap acts as a bypass to slow the rise and fall times and therefore overwhelms the parasitic capacitance. Is a fine and reasonable thing to do and a good call to solve the spiking yourself. I'd say the value is too high. A 100nF aka 0.1uF or would be more typical. Smaller than that may also work and not reduce the rise/fall so much. If 1ms is fast enough for you then great, just consider a smaller cap then for avoiding electrolytics since ceramics get pricey in the uF range. Can use a 1-3 ohm resistor in series with ceramic or film if you need the smoothening effect from electrolytic ESR.

Smaller capacitance has a smaller RC time constant and thus bypasses higher frequencies. The 2ns is really high frequency, almost GHz range. But I don't recommend spending the time to find the perfect value. Not how this process works. You can be off by a factor of 2x or 10x or more and be just fine.

Good point made about measurement technique. Sometimes the spikes are due to the probe parasitics that resonate in the circuit.

[tggzzz]

The root cause of the spikes is inductance, not capacitance.

2ns is not "a really high frequency", it is a time period.

2ns risetimes are commonplace, and jellybean logic (74lvc1g*) switches in well under 1ns. It isn't difficult to use them to drive a 2.5V step into 50ohms with a <300ps risetime.

[MarkT]

So, the wires are acting like inductors?

Everything has some inductance, no current can flow without setting up a magnetic field, and thus everything has inductance.

It takes very little inductance to cause strong effects on a 2ns timescale - stray inductance and capacitance are usually dominant at these speeds.

[the_cake_is_a_lie]

The root cause of the spikes is inductance, not capacitance.

2ns is not "a really high frequency", it is a time period.

2ns risetimes are commonplace, and jellybean logic (74lvc1g*) switches in well under 1ns. It isn't difficult to use them to drive a 2.5V step into 50ohms with a <300ps risetime.

It's both since there are resonant LC frequencies? I don't mean to say that 2ns is rare, just that it's really fast. In beginner world I learned with slow BJT 74 logic gates that were cheap. Beginners probably don't need logic gates that switch in under 2ns but doesn't hurt to play with better toys and learn different things.

The rise or fall of a square wave or step function has an AC response based on its fundamental frequency modeled with Fourier. The greater the rate of change, the greater this frequency. We can think of it as a time period if that's more logical. Fourier of a square wave is really a trapezoid. A low pass filter can deform this trapezoid due to filtering on just its rise and fall frequencies / time periods.

I'm sorry if I'm being pedantic.

[EPAIII]

Where is it coming from? The magnetic field around the output conductor is collapsing. That induces a reverse Voltage, in this case a negative one. It is an inductive effect. It is commonly called ringing.

Scope probes use variable capacitors (the opposite of inductors) to compensate for it. The capacitor you tried is probably too big to provide the optimum compensation. You can either try different capacitance values or use a variable one and tune it.

[tggzzz]

The rise or fall of a square wave or step function has an AC response based on its fundamental frequency modeled with Fourier. The greater the rate of change, the greater this frequency. We can think of it as a time period if that's more logical. Fourier of a square wave is really a trapezoid. A low pass filter can deform this trapezoid due to filtering on just its rise and fall frequencies / time periods.

I'm sorry if I'm being pedantic.

That's "pedantically" wrong. The fundamental frequency/period is irrelevant.

For a little theory and practical demonstration, see https://entertaininghacks.wordpress.com/2018/05/08/digital-signal-integrity-and-bandwidth-signals-risetime-is-important-period-is-irrelevant/