Dipping my toe in digital electronics

[jdutky]

There is not much I can do to make the printing on the chips more visible, but I have found that viewing the chip at a shallow angle can make the printing easier to see. I will try to get pictures of the circuit that reveal the printing on the chips and attach them to a subsequent comment.

I was thinking you could just mark up the layout on paper (showing  the chip placement) and take a picture of it. 

Is this something like what you are attempting to make?   It appears this was the only post they made before moving onto another project.   


Or maybe something like this?



We used 3M boards back then.  I really have no experience with modern boards.   Watching the video now and it seems like it may provide you with some insight.     

That's EXACTLY what I'm trying to make, both the simple CPU running from hardwired NOPs, and then something with memory and a front panel after that. Beyond that, I have made no plans. As the fellow in the first video says: it's no fun unless you can see blinking lights.

[jdutky]

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

Read this...  Then read it again!  Notice that combinational logic isn't available for every family, even within simple CMOS families.

https://www.ti.com/lit/sg/sdyu001ab/sdyu001ab.pdf

Some logic families are for low voltage (less than 5V) the CD4xxx CMOS family will generally, an usually, run at higher than 5V.  Some are faster than others.

Personally, I would stay with 74LSxxx even though it consumes a LOT more power.  This is based on my limit of about 100 chips for a wire-wrap project.  The total power would still be reasonable.

Actually, I have pretty much given up on discrete logic and prefer to use FPGAs.  I don't, but if I wanted to, I could code the HDL to match the specs of any logic device (timing would vary but that's easily handled) and then instantiate the project as interconnected logic gates.  I wouldn't recommend that approach but it would certainly work.

Even in the FPGA world, I still need to deal with the fact that the outside world may not run at 1.8V or 3.3V and level translators may be required.

I have (many, many years ago) studied VHDL and Verilog with the intention of doing this sort of project in an FPGA, but now, under the strictures of the pandemic, I feel like I want the authentic experience of discrete logic in dual inline packages. I'm doing this entirely for my own entertainment and edification, so efficiency of any sort is of no concern.

But I do take your point. I'm willing to meet you half way and implement all my glue logic in PALs/GALs, as soon as I figure out program the damn things (I have a "TL866 II plus" that I bought to burn EPROMs, which says it will do PALs, GALs and CPLDs, but I've also read on-line that there are vendor specific dependencies, as well as limits on what PALs/GALs/CPLDs are still in production. But that is yet another topic I have not wanted to broach yet).

[jdutky]

Might be too basic but maybe something in here useful:
https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-voltage-levels/

That is almost EXACTLY as basic as I need it to be, thank you.

[Electro Fan]

rstofer, thanks for finding/posting this:
https://www.ti.com/lit/sg/sdyu001ab/sdyu001ab.pdf
This is an excellent overview/summary of logic device families.

EDIT/PS:

It’s “funny” how the study of electricity is so broad and deep and essentially infinite that you can easily conclude it’s hopeless (especially without formal education and training) to ever get things assembled into a reasonably full and clear view - and it can seem doubly challenging if you want to glue together a view of both analog and digital.  But sometimes just when you think you will have to be resigned to thinking there is too much complexity (too many parts - both conceptually made by the laws of nature and described by humans as physics and math, as well as seemingly random part numbers as assigned by human commerce) .... and then one day we trip across a post, a link, a document and all of a sudden, at least temporarily stuff seems to fall into a place of understandable order.  It does’t mean you can understand much less apply and harness all of it, but at least the outline of something (in this case IC logic device numbers) that looked random and infinite starts to look possibly ordered and maybe even nearly finite.  Even though experience indicates exceptions and expansion will be coming back into view almost immediately, it’s nice to occasionally/momentarily enjoy the new vista.

For anyone who thinks the numbering system and purposes of logic devices / ICs are darn near impossible to grasp, save these two links as favorites.  And if anyone finds more such summary info on ICs, please post.

https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-voltage-levels/

https://www.ti.com/lit/sg/sdyu001ab/sdyu001ab.pdf

Thanks to jdutky and rstofer and everyone who catalyzed this thread.

[joeqsmith]

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

Read this...  Then read it again!  Notice that combinational logic isn't available for every family, even within simple CMOS families.

https://www.ti.com/lit/sg/sdyu001ab/sdyu001ab.pdf

Some logic families are for low voltage (less than 5V) the CD4xxx CMOS family will generally, an usually, run at higher than 5V.  Some are faster than others.

Personally, I would stay with 74LSxxx even though it consumes a LOT more power.  This is based on my limit of about 100 chips for a wire-wrap project.  The total power would still be reasonable.

Actually, I have pretty much given up on discrete logic and prefer to use FPGAs.  I don't, but if I wanted to, I could code the HDL to match the specs of any logic device (timing would vary but that's easily handled) and then instantiate the project as interconnected logic gates.  I wouldn't recommend that approach but it would certainly work.

Even in the FPGA world, I still need to deal with the fact that the outside world may not run at 1.8V or 3.3V and level translators may be required.

I have (many, many years ago) studied VHDL and Verilog with the intention of doing this sort of project in an FPGA, but now, under the strictures of the pandemic, I feel like I want the authentic experience of discrete logic in dual inline packages. I'm doing this entirely for my own entertainment and edification, so efficiency of any sort is of no concern.

But I do take your point. I'm willing to meet you half way and implement all my glue logic in PALs/GALs, as soon as I figure out program the damn things (I have a "TL866 II plus" that I bought to burn EPROMs, which says it will do PALs, GALs and CPLDs, but I've also read on-line that there are vendor specific dependencies, as well as limits on what PALs/GALs/CPLDs are still in production. But that is yet another topic I have not wanted to broach yet).

For the discrete logic, I would suggest going one step further and stay with the exact parts called out on the schematic you're trying to replicate. 

You may find that some of the older programmable logic will cost you more than an FPGA.   Tools may pose a problem.   I used to use PALASM but there was some point where I could not get it to run with Windows and I changed to CUPL (nightmare).   Eventually I moved to the Lattice tools.  A few years ago I tried to make a small computer that had a GAL.  I tried running the Lattice ispExpert 7.1 under Windows 10 and it worked.   

I just tried running PALASM under a DOSBOX with Windows 10 and that seems to work.  Considering that it's 30 years old now, that's impressive.  So, looks like the tools won't pose much of a problem.  If you can't find PALASM, let me know.


***
Using a modern FPGAs your resources would be enough that you could roll your own 68xx.   I was playing around making my own hybrid sort of 6811ish in an FPGA many years ago.  Todays parts would make short work of it, not to mention there are evaluation boards that would allow you to focus the code rather than the hardware.   Not suggesting you go this route as you seem to have your heart set on a discrete approach. 

Hardware starts about 8mins in.


You can see it running here with some very old LabView and DOS programs.


Times have sure changed.

[jdutky]

For the discrete logic, I would suggest going one step further and stay with the exact parts called out on the schematic you're trying to replicate. 

You may find that some of the older programmable logic will cost you more than an FPGA.   Tools may pose a problem.   I used to use PALASM but there was some point where I could not get it to run with Windows and I changed to CUPL (nightmare).   Eventually I moved to the Lattice tools.  A few years ago I tried to make a small computer that had a GAL.  I tried running the Lattice ispExpert 7.1 under Windows 10 and it worked.   

I just tried running PALASM under a DOSBOX with Windows 10 and that seems to work.  Considering that it's 30 years old now, that's impressive.  So, looks like the tools won't pose much of a problem.  If you can't find PALASM, let me know.


***
Using a modern FPGAs your resources would be enough that you could roll your own 68xx.   I was playing around making my own hybrid sort of 6811ish in an FPGA many years ago.  Todays parts would make short work of it, not to mention there are evaluation boards that would allow you to focus the code rather than the hardware.   Not suggesting you go this route as you seem to have your heart set on a discrete approach. 

Hardware starts about 8mins in.


You can see it running here with some very old LabView and DOS programs.


Times have sure changed.

Not going to lie; those wire wrapped boards are things of beauty! What he's done with those FPGAs is pretty damn impressive, but I guess I'm looking to recreate a slightly different era with my hobby. I'm a software engineer in my day job, and writing more code that I then run through a compiler and drop on a couple of chips doesn't really interest me that much. The feel of a hot soldering iron and smell of burning resin, however, is a cherished and comforting childhood memory.

I'm starting out with an 8-bit micro because it feels like the right balance between functionality and difficulty for my skill level. Once I get more experience, however, what I really want to build is a 16-bit mini, something like a cross between an enhanced 6502 and a hobbled PDP-11 (I'm actually taking a bunch of the architectural ideas from the Varian 6xx and V7x series computers, with which I have a family history). If I had any experience with wire-wrapping I would probably be doing it that way, but I've only ever worked with either solderless breadboards or soldered techniques (regular PCBs, point-to-point, and matrix breadboards).

I'm planning to build something around the 74181/2/3 ALU/carry gen/fast adder (which I have a small stash of), and then just throw a bunch of SRAM and PROMs at it for memory, sequencing, and the more complex glue logic. First, however, I need to get comfortable with the tools and technology.

Seriously, though, that wire wrapping is amazing work, especially the tiny coax he used for the clock distribution. Wow.

[jdutky]

I found that I had some 74LS76Ns (rather than the 74LS76AN that I had used previously) and replaced the 74LS75AN with that. I also compared both versions of the example clock circuit in the two versions of the datasheet that I have (the one with the transistor on the Q output is from what I will call the Thompson datasheet, and the one with the inverter on the Q output I will call the JameCo datasheet, based on where I got the two versions from), and re-derived my breadboard layout from the verified circuit schematic. Sadly, nothing significant about the output has changed.

Below, in order, are my schematic copied from the datasheets (omitting the optional MRDY sub-circuit and the Q output pull up circuits because I'm trying to concentrate on getting the right output from the JK flip-flops), then my breadboard realization of the circuit, followed by a low angle image showing how I'm probing the circuit, and finally the scope outputs comparing each of the Q, E_cpu, and E_sys outputs to the oscillator clock.

My expectation is that the high and low times for the Q and E outputs should be symmetrical, but there is a 1:2 ratio (low:high for Q and E_cpu, and high:low for E_sys). Is there something I should be doing with the circuit to prime the flip-flop values on power up (e.g. should I put pull-up/pull-down resistors on the Q/~Q pins, or something)?

This is frustrating, but I feel like I'm really close to getting this to work.

The scope configuration is:

• channel 1 (oscillator) is the upper trace
• channel 2 (circuit output) is the lower trace
• 2 V/div vertical, both channels
• 200 ns/div horizontal
• trigger on the falling edge of channel 1 (oscillator output)
• both channels and trigger are DC coupled

(I know that the scope output seems to show that the oscillator is running at about 3.125 MHz, while the oscillator can reads 3.088 MHz, which is off by about 1.2%. I don't know whether or not that is within the tolerance of the oscillator specs, but this scope was last calibrated in 1979, so I would not be surprised if the horizontal timebase had drifted a little bit)

(also, I now realize realize that my probe of the oscillator output is using entirely the wrong ground line, which is causing a bunch of ringing in the scope traces. In my defense, I'm an idiot)

(also in my defense, I'm becoming comfortable with the idea that, so long as I'm building, and probing, these circuits on a solderless breadboard I am just going to have this kind of noise in my measurements. If it weren't so much work to modify soldered breadboards I would ditch the solderless ones altogether)

[joeqsmith]

I rechecked your schematic and wiring and it appears correct.   

Just for fun I built up your last circuit using the worse possible probing, no by-pass, no bulk, no termination.  5V supply.   Shown running the same circuit at 16MHz and then at 50MHz.  I have a few different brands of the 7476 that I tried and all have roughly the same performance.   At least it should give you some idea  that what you have shown could work. 

Maybe you want to consider some better parts or maybe change over to solder as it seems this is really what you want to do anyway.   

[tggzzz]

I'm planning to build something around the 74181/2/3 ALU/carry gen/fast adder (which I have a small stash of), and then just throw a bunch of SRAM and PROMs at it for memory, sequencing, and the more complex glue logic. First, however, I need to get comfortable with the tools and technology.

There is a half-way house: bit slice designs like the AMD 2900 series. They are like a 74181 plus surrounding gunk in one chip, address sequencers in another, and so on. They were used to implement things like Data General Nova 4, PDP-11/23, PDP-11/34, Atari's vector graphics arcade machines, AT&T 3B20D Processor, VAX-11/730 and DECsystem-2020. It looks like they are still available (see octopart), but it would probably be easier to re-implement them in a PAL/FPGA.

Even if you don't use them, understanding the concepts may shape your strategy.

The classic book is "Bit-slice Microprocessor Design" by Mick and Brick.

[tggzzz]

(also, I now realize realize that my probe of the oscillator output is using entirely the wrong ground line, which is causing a bunch of ringing in the scope traces. In my defense, I'm an idiot)

Easy mistake to make. Easy to avoid if there is a full ground plane.

(also in my defense, I'm becoming comfortable with the idea that, so long as I'm building, and probing, these circuits on a solderless breadboard I am just going to have this kind of noise in my measurements. If it weren't so much work to modify soldered breadboards I would ditch the solderless ones altogether)

It isn't much work (especially if you include the time not spent debugging[1]), if you use the construction techniques used by the masters. See "dead bug" and "manhattan" in https://entertaininghacks.wordpress.com/2020/07/22/prototyping-circuits-easy-cheap-fast-reliable-techniques/#more-931

[1] hey, as a softie you ought to be well aware of that phenemon!

[joeqsmith]

To give you some additional ideas,  keeping the clock at 50MHz, I added an 80 ohm terminator to the end of the clock and added a single 0.1uF to the supply of the FF.   The cap didn't bring much to the party.  The 80 ohm is really loading the clock and I'm surprise the circuit still runs.   

While playing with PALASM,  I brought up another old digital simulator and put your last circuit in it.  I would expect that free MicroCap simulator has mixed mode and a 74xx library.  You may want to have a look at it. 

[Electro Fan]

(also, I now realize realize that my probe of the oscillator output is using entirely the wrong ground line, which is causing a bunch of ringing in the scope traces. In my defense, I'm an idiot)

Easy mistake to make. Easy to avoid if there is a full ground plane.

To to confirm/clarify/understand.... is this saying that probing the oscillator directly (on, or near?, an oscillator pin), rather than probing the ground plane provides a different result - because the probe loads/couples the pin differently than it would the ground plane?  Thx

[tggzzz]

(also, I now realize realize that my probe of the oscillator output is using entirely the wrong ground line, which is causing a bunch of ringing in the scope traces. In my defense, I'm an idiot)

Easy mistake to make. Easy to avoid if there is a full ground plane.

To to confirm/clarify/understand.... is this saying that probing the oscillator directly (on, or near?, an oscillator pin), rather than probing the ground plane provides a different result - because the probe loads/couples the pin differently than it would the ground plane?  Thx

"Loads" isn't the right concept. The problem is interconnecting wires (including the ground lead) which have ~1nH/mm inductance. And we know what happens with an inductor and capacitor

See, for example, https://entertaininghacks.wordpress.com/2015/04/23/scope-probe-accessory-improves-signal-fidelity/ and https://entertaininghacks.wordpress.com/2016/09/17/scope-probe-accessory-higher-frequency-results/#more-823

Having a solid uninterrupted ground plane is good for the circuit and makes it easy to have a very short lead (~10mm) probe ground.

[Electro Fan]

(also, I now realize realize that my probe of the oscillator output is using entirely the wrong ground line, which is causing a bunch of ringing in the scope traces. In my defense, I'm an idiot)

Easy mistake to make. Easy to avoid if there is a full ground plane.

To to confirm/clarify/understand.... is this saying that probing the oscillator directly (on, or near?, an oscillator pin), rather than probing the ground plane provides a different result - because the probe loads/couples the pin differently than it would the ground plane?  Thx

"Loads" isn't the right concept. The problem is interconnecting wires (including the ground lead) which have ~1nH/mm inductance. And we know what happens with an inductor and capacitor

See, for example, https://entertaininghacks.wordpress.com/2015/04/23/scope-probe-accessory-improves-signal-fidelity/ and https://entertaininghacks.wordpress.com/2016/09/17/scope-probe-accessory-higher-frequency-results/#more-823

Having a solid uninterrupted ground plane is good for the circuit and makes it easy to have a very short lead (~10mm) probe ground.

Ok, Thx

Found this - might be part of what I'm trying to better understand; might be helpful to others. 
https://assets.testequity.com/te1/Documents/pdf/probes-affect-measurement-an.pdf

[jdutky]

Yes, I'm aware of the AMD 2900 parts. I have been looking for AM2900 parts, but, so far, have only found the lookahead carry generator (which I was planning to use in place of the 74182, but then I found some 74182's online). If I can find a source for the AM2901 (the ALU) then I would like to build something using that.

The question of sequencing logic is going to be tough: I'm pretty much resigned to using some kind of programable logic, rather than building something historically accurate. I'd like to use a PAL or GAL, but it seems easiest just to use an EEPROM and a counter. I haven't gotten to that stage of the design, though, so I'm really not sure what will be necessary.

Honestly, building a 16-bit mini is more about the blinkenlights and flippenswitches (mit grubenfingers) than anything else. Sadly, I don't have either an ASR-33 or a Tek 4010 to use as a console, and the only paper tape reader that I have has deteriorated to point that is probably non-repairable (it had cork wrapping on the feed spindle, and the cork has literally turned to dust). There is a lot about recreating the minicomputer experience that I'm simply going to have to forego.

[jdutky]

I rechecked your schematic and wiring and it appears correct.   

Just for fun I built up your last circuit using the worse possible probing, no by-pass, no bulk, no termination.  5V supply.   Shown running the same circuit at 16MHz and then at 50MHz.  I have a few different brands of the 7476 that I tried and all have roughly the same performance.   At least it should give you some idea  that what you have shown could work. 

Maybe you want to consider some better parts or maybe change over to solder as it seems this is really what you want to do anyway.   

I've ordered 74LS76 parts from several different sources, and it looks like I only ever get TI parts. I'll see what I can get from one of the bigger name distributors, but when I've checked on Digi-Key and Mouser it looks like they don't want to supply DIP parts anymore.

I do have other JK flip flops, however, and I think I might have solved my problems using a 74LS112 (about which I will post separately, because it's a bit involved), but I think I might also have found the bug in my 74LS76 circuit.

In order to debug the circuit I disconnected the "wrap around" connections from the the outputs of the second JKFF to the inputs of the first, and tied the inputs of the first JKFF high (so that it just toggles and halves the input clock). This yielded a couple of interesting results:

First, Q and ~Q of both JK flip flops do not appear to be inverted versions of each other! I see in manually clocked testing that one output (Q) changes state on the falling edge of the clock, while the other output (~Q) changes state on the rising edge. This puts ~Q out of phase with Q by 90 degrees. This is not what I expect the JK flip flop to be doing.

The real problem, though, appears to be a large transient in the ~Q output of the second flip flop. Attached are my notes on the modified test circuit showing all four outputs in relation to the clock, and a picture of the scope trace for ~Q2 and the clock.

I had thought that these transients might be the result of my poor probe technique, but they remain even when I use the ground springs and carefully probe as close as possible to the chip's ground pin, or that they were some kind of crosstalk in my antique scope (there IS crosstalk in the scope, but it is only visible when I've got the inputs set to less than 5 mV/div. I am well above that range when working with TTL signals). The large transient coincides exactly with the deformation of the Q and ~Q outputs of the second flip flop in the full circuit (where the duty cycle ends up being 2:1 rather than 1:1). The transient is more than large enough to cause the flip flop to incorrectly change state.

I don't know how I'm going to fix that transient, but the current circuit has no bypass caps, so I will start there. Damping the signals with a termination resistor sounds like it's worth a try as well. That said, I don't feel as if I understand the origin of this transient in any real way. Is it coming from the breadboard, or is it something happening internal to the 74LS76? Since there are multiple transients, all aligned to the edges of the clock signal, I am tempted to think that this is due to inadequate bypassing, and the power rail inside the chip sagging on each clock transition, but I'm largely talking out my ass on this.

[joeqsmith]

Part of learning is overcoming problems.  Just stick with it. 

I'm not sure if this helps or not.  I built up a second circuit using a D rather than the J-K.  I have a lot more 7474s.   I ran the clock in series.  Added a couple more 0.1s for the second part. 

The CH0/1 are looking at the 7474 and the CH2/3 are looking at the original.   Still using the long 6" ground wires, $9 probes with a few inches of wire to probe the board.   

The first set is a MM74C74N by NSC with a 4MHz clock.  /4 so 1MHz being displayed.   These parts are slow and very forgiving. 

The second set is a DM74LS74 by NSC with a 4MHz clock.

For some fun, the last part is a 74F74 by Signetics using a 16MHz clock.  I've used these parts over 100MHz but would need to build something better to demonstrate them.  On the breadboard,  it's 4X faster than the 6809 you plan to use.

If you wanted to try the more common D, just route Q1 to D2, Q2' to D1. 

[Martian Tech]

Sadly, I don't have either an ASR-33 or a Tek 4010 to use as a console

Look for a TI Silent 700 model 703.  They're reasonably priced relative to most vintage terminals, and you can still get the thermal paper they use.

Model 703 runs at 300 bps (though there is a 1200bps version as well) and has an RS-232 port.  Avoid the Model 707, as that has a built-in modem as its only interface.

[jdutky]

Part of learning is overcoming problems.  Just stick with it. 

I'm not sure if this helps or not.  I built up a second circuit using a D rather than the J-K.  I have a lot more 7474s.   I ran the clock in series.  Added a couple more 0.1s for the second part. 

The CH0/1 are looking at the 7474 and the CH2/3 are looking at the original.   Still using the long 6" ground wires, $9 probes with a few inches of wire to probe the board.   

The first set is a MM74C74N by NSC with a 4MHz clock.  /4 so 1MHz being displayed.   These parts are slow and very forgiving. 

The second set is a DM74LS74 by NSC with a 4MHz clock.

For some fun, the last part is a 74F74 by Signetics using a 16MHz clock.  I've used these parts over 100MHz but would need to build something better to demonstrate them.  On the breadboard,  it's 4X faster than the 6809 you plan to use.

If you wanted to try the more common D, just route Q1 to D2, Q2' to D1. 

LOL, I'm not sure it helps either, but it's interesting to see your results.

Also, I had not realized that the wire wrapped board was your work. I already said it, but I just wanted to make sure the compliment was correctly delivered: that was some really beautiful work!

I've had a look at DigiKey, Mouser, and Arrrow, and either they won't supply DIPs in hobbyist quantities, or they only stock TI parts (for the 74LS76). JameCo only seems to stock TI parts. Amazon is a circus. I didn't find anything on Adafruit or Element14. There used to be bricks-and-mortar places I could go locally (Maryland) for this sort of thing, but most, if not all of them closed up a decade ago. Are there other modern distributors that are willing to supply hobbyists?

[jdutky]

Sadly, I don't have either an ASR-33 or a Tek 4010 to use as a console

Look for a TI Silent 700 model 703.  They're reasonably priced relative to most vintage terminals, and you can still get the thermal paper they use.

Model 703 runs at 300 bps (though there is a 1200bps version as well) and has an RS-232 port.  Avoid the Model 707, as that has a built-in modem as its only interface.

I'll have a look for one of those, though the noise is a big part of the charm of an ASR-33. I did see a Wyse terminal which, while lacking all the charm of Tek 4010, did offer a reasonable emulation mode. The price, however, was not at all reasonable (almost $500 on eBay). I'm pretty much resigned, however, to just hooking up to my project via a serial line and terminal emulator on a modern PC, when I'm not plugging away at the front panel.

For the 6809 project, however, I have a slightly better plan: I just ordered two old Sony Watchman handheld TVs, and plan to try modifying them ala the TV Typewriter. For the 6809 this seems like the perfect display device, especially if I can get my hands on an MC6850 (or similar) to generate the video signal. If you bypass the receiver stage you can get pretty good resolution out of a black-and-white TV.

[joeqsmith]

Part of learning is overcoming problems.  Just stick with it. 

I'm not sure if this helps or not.  I built up a second circuit using a D rather than the J-K.  I have a lot more 7474s.   I ran the clock in series.  Added a couple more 0.1s for the second part. 

The CH0/1 are looking at the 7474 and the CH2/3 are looking at the original.   Still using the long 6" ground wires, $9 probes with a few inches of wire to probe the board.   

The first set is a MM74C74N by NSC with a 4MHz clock.  /4 so 1MHz being displayed.   These parts are slow and very forgiving. 

The second set is a DM74LS74 by NSC with a 4MHz clock.

For some fun, the last part is a 74F74 by Signetics using a 16MHz clock.  I've used these parts over 100MHz but would need to build something better to demonstrate them.  On the breadboard,  it's 4X faster than the 6809 you plan to use.

If you wanted to try the more common D, just route Q1 to D2, Q2' to D1. 

LOL, I'm not sure it helps either, but it's interesting to see your results.

Also, I had not realized that the wire wrapped board was your work. I already said it, but I just wanted to make sure the compliment was correctly delivered: that was some really beautiful work!

I've had a look at DigiKey, Mouser, and Arrrow, and either they won't supply DIPs in hobbyist quantities, or they only stock TI parts (for the 74LS76). JameCo only seems to stock TI parts. Amazon is a circus. I didn't find anything on Adafruit or Element14. There used to be bricks-and-mortar places I could go locally (Maryland) for this sort of thing, but most, if not all of them closed up a decade ago. Are there other modern distributors that are willing to supply hobbyists?

Yeah, I have done a fair amount of wire wrapping in the past.  That particular board was really just a small part of the project.  I wrote a ucode compiler to create the instructions, designed the hybrid 6811, had to write diagnostic code to test the hardware.  Write some applications for it.  Make a PC interface to run it.  Windows drivers.  It was a lot of fun.     

I looked at Digikey  to see if I could get some new stock.  This is why I was suggesting you may want to change the design to something more common. 

I tried a quick sloppy construction using surface mount caps, shed the long leads from my $9 probes and left it unterminated.   The board has both power and ground strips.   Clocking the 74F74 at 60MHz.   

[jdutky]

Also, I had not realized that the wire wrapped board was your work. I already said it, but I just wanted to make sure the compliment was correctly delivered: that was some really beautiful work!

I've had a look at DigiKey, Mouser, and Arrrow, and either they won't supply DIPs in hobbyist quantities, or they only stock TI parts (for the 74LS76). JameCo only seems to stock TI parts. Amazon is a circus. I didn't find anything on Adafruit or Element14. There used to be bricks-and-mortar places I could go locally (Maryland) for this sort of thing, but most, if not all of them closed up a decade ago. Are there other modern distributors that are willing to supply hobbyists?

Yeah, I have done a fair amount of wire wrapping in the past.  That particular board was really just a small part of the project.  I wrote a ucode compiler to create the instructions, designed the hybrid 6811, had to write diagnostic code to test the hardware.  Write some applications for it.  Make a PC interface to run it.  Windows drivers.  It was a lot of fun.     

I looked at Digikey  to see if I could get some new stock.  This is why I was suggesting you may want to change the design to something more common. 

I tried a quick sloppy construction using surface mount caps, shed the long leads from my $9 probes and left it unterminated.   The board has both power and ground strips.   Clocking the 74F74 at 60MHz.   

Wow, I had no realized that you could use SMD components on regular perf board like that, but it's obvious once you see it done. I haven't tried my hand at soldering SMDs yet, and my hands aren't getting any steadier with age. I am getting ready to make a couple of custom keyboards, however, and I will probably need to tackle SMDs for one of those (or just use one of the hobbyist MCUs on a daughter card, which seems a lot easier, and probably wouldn't compromise my space or power constraints in any noticeable way).

I tried adding bypass caps to my cut down 74LS76 circuit, to see if I could eliminate the transient that seems to be screwing things up. I put a regular 20 pF bypass cap on the oscillator and that seemed to clean up the clock signal quite nicely. For the 74LS76, however, I tried several progressively larger caps with no significant change to the transient spike. I ended up putting a 1 uF electrolytic across the power and ground pins. Most of the output signal came out wonderfully clean, but the transients are still there, and the troublemaker is completely unchanged.

I also tried increasing the voltage and current limits, but the circuit stubbornly draws a consistent 10 mW at 5V, and the spike just scales up when I increase the voltage from the supply. I haven't tried adding termination resistors, yet.

Here is a scope trace of the output and clock with absurdly large bypass caps.

[jdutky]

Still trying to figure out why the 74LS76 circuit doesn't work as expected, I was told to try some parts from other manufacturers (the part I have in hand is a TI SN74LS76N) but I don't have, nor can I seem to get, this chip from other manufacturers (at least, not in hobbyist quantities at hobbyist prices). Instead, I went back to the chip I started with before my order of 74LS76s arrived: a 74LS112 dual JK flip flop, negative edge triggered. I originally used it because it sounded like an ideal replacement for the LS76. It's not a drop-in replacement, but it wasn't hard to modify the circuit for the different pin layout.

Since I had already tried this chip and it had not worked it was no big surprise that it didn't work this time either, but I figured that I would debug the circuit by paring it down bit-by-bit. I had done some manual testing of the LS76 and had a better idea of how the JKFFs should operate outside of the feedback arrangement used in the target circuit, so the first thing I tried was removing the feedback links from FF2's outputs to FF1's inputs, tying the inputs high and turning the first flip flop into a toggle on the input clock that then outputs a half speed clock on its outputs.

That worked, and I was seeing nice, clean signals from the outputs on both flip flops. On a whim I decided to reconnect the feedback, but to reverse the feedback connections (instead of J1:~Q2 and K1:Q2 I connected J1:Q2 and K1:~Q2) and the circuit started outputting what looked suspiciously like the clock/2 staggered signals I was looking for!

Attached is the 74LS112 circuit schematic and wiring diagram, an image of the circuit itself (this chip, from Mitsubishi, has nice, clear printing on the case), as well as the scope traces for Q, E-cpu, and E-sys. If I can't figure out ow to fix the 74LS76 circuit I think that I can use the 74LS112 instead (I see now that I probably can't use the MC6875 to generate the clock signals for the 68B09E because the two phases produced by the MC6875 don't overlap as the 68B09E requires).

[rstofer]

If you have a 74LS00 Quad NAND Gate, you can replace the oscillator with a debounced pushbutton.  Then you can walk the flops through the 4 states one step at a time.

Document page 10..11 "Hardware Debouncers"

https://my.eng.utah.edu/~cs5780/debouncing.pdf

Those open triangle symbols are the Vcc rail for the pull-up resistors.

[joeqsmith]

I didn't spend a lot of time with it but your schematic does not appear to match your wiring diagram.  The circuit you show wired up has the inversion and I suspect it would provide the 90 degree shift /4.   

I will typically use SMT with my experiments.  They are easier to work with, take up less space and typically will have lower parasitics.  As you start working at higher speeds, there's no getting around it.  Even that old wire-wrap board has some surface mounted parts.  The Pericom clock driver and the two FPGAs that hold the design are all surface mount.  I used some Aries adapters to get to the PGA which I could then wire wrap to.  For the time, running the FPGAs at 100Mhz would have been common but not on a wire wrap board (for good reason).   Like I wrote, I do like to dabble in the art. 

Again, for what you are doing, I think your fine with TH and the breadboard.   Many years ago I was on a project where we had used some 3M breadboards, each with 4 boards.  I think we had 8 if these large boards fully populated.  The system had multiple CPUs on it along with some analog.  We managed to get it all working before we switched to surface mount and PCBs.  Things ran at a snails pace back then. 

Those old gates made for good filters.   Today's parts are crazy fast.   3 years ago I picked up a cheap Digilent eval board with a small Xilinx part on it.  Link shows some of my experiments with it where it looks I clocked it at 700MHz.   Just looking 15 years back to what we have today is amazing.  Back then, I was running some very expensive parts at over 400MHz.   

https://www.eevblog.com/forum/microcontrollers/typical-speed-of-fpgas/msg1279898/#msg1279898