Dipping my toe in digital electronics

[rstofer]

I did find something shocking, however: when I went to select the capacitors for the crystal circuit the datasheet specified 20 pF caps for a 6 MHz crystal. I have an unopened box of shiny new ceramic caps that I bought off Amazon (LORESO brand, 600 pieces! from 10 pF to 4.7uF in 24 steps! Only $19, free shipping! What a BARGAIN!) and the caps marked 20 pF measure as 35-36 pF (!!) and the ones marked 10 pF measure 38 pF (!!!). These are ceramic caps, not your sloppy electrolytic sort; I expect them to be within at least 50% of their marked values (maybe I'm naive; maybe the world no longer cares about such pedestrian details?).

So the CPU is genuine and accurately marked, but the capacitors are garbage. Fascinating.

When you buy the "big bag of ...", you are getting "floor sweepings".  These are devices that are so far out of spec that they simply can't sell them as real parts.  A lot of people swear by these grab bags but I'm of the opinion that I would rather have compliant parts from a reputable source - like DigiKey or Mouser.

Decent 0.1 ufd ceramic 10% capacitors tend to cost about $0.25 each.  You will most commonly see -20% +80% but they can be as good as 1%

10%:
https://www.digikey.com/en/products/detail/murata-electronics/RDER71H104K0S1H03A/4772307

5% are a lot more expensive but you only need a couple:

https://www.digikey.com/en/products/detail/tdk-corporation/FG26C0G1H104JNT06/5812001

For general decoupling, -20% +80% is typical:

https://www.digikey.com/en/products/detail/vishay-beyschlag-draloric-bc-components/K104Z15Y5VE5TL2/286602

Note that the -20% +80% isn't a lot cheaper than the +-10%

I never buy parts in grab bags and I don't buy from China either.  I have enough complications without using floor sweepings.

[joeqsmith]

Not that we would run at a Hz but even at 3MHz, the time we have to settle is very long.  Normally, it won't pose a problem.

Settling time is irrelevant.

I suggest you do some basic research on these topics

• ground bounce
• hold time
• signal propagation in a transition line
• clock signals that don't have a clean and fast risetime

I've dabbled.   

Considering the OP is using very old technology, not that you couldn't run into problems but it was far less likely.   

[tggzzz]

Not that we would run at a Hz but even at 3MHz, the time we have to settle is very long.  Normally, it won't pose a problem.

Settling time is irrelevant.

I suggest you do some basic research on these topics

• ground bounce
• hold time
• signal propagation in a transition line
• clock signals that don't have a clean and fast risetime

I've dabbled.   

Considering the OP is using very old technology, not that you couldn't run into problems but it was far less likely.

Hold time violations screw you in any technology.
Voltage outages can be worse in old technology: search for SCR latchup.
Some old technologies require a non-standard and especially clean and clock. The MC6800 springs to mind, but I'm sure there are others.

[joeqsmith]

Not that we would run at a Hz but even at 3MHz, the time we have to settle is very long.  Normally, it won't pose a problem.

Settling time is irrelevant.

I suggest you do some basic research on these topics

• ground bounce
• hold time
• signal propagation in a transition line
• clock signals that don't have a clean and fast risetime

I've dabbled.   

Considering the OP is using very old technology, not that you couldn't run into problems but it was far less likely.

Hold time violations screw you in any technology.
Voltage outages can be worse in old technology: search for SCR latchup.
Some old technologies require a non-standard and especially clean and clock. The MC6800 springs to mind, but I'm sure there are others.

I can recall one time where I had to solve someones timing violation back in those days.   I don't know what a voltage outage would be.  Loss of one of the power rails?   If so, I don't see the problem.   I have never had a problem with latchup.   

The parts OP is working with are 5V technology, combined with the slow slew rates and low clock rates,  the margins are huge and easy to work with.  Even on a breadboard.   

I've used some of the Motorola parts.  These old 8-bit ones where the workhorses of the time. 

[tggzzz]

Not that we would run at a Hz but even at 3MHz, the time we have to settle is very long.  Normally, it won't pose a problem.

Settling time is irrelevant.

I suggest you do some basic research on these topics

• ground bounce
• hold time
• signal propagation in a transition line
• clock signals that don't have a clean and fast risetime

I've dabbled.   

Considering the OP is using very old technology, not that you couldn't run into problems but it was far less likely.

Hold time violations screw you in any technology.
Voltage outages can be worse in old technology: search for SCR latchup.
Some old technologies require a non-standard and especially clean and clock. The MC6800 springs to mind, but I'm sure there are others.

I can recall one time where I had to solve someones timing violation back in those days.   I don't know what a voltage outage would be.  Loss of one of the power rails?   If so, I don't see the problem.   I have never had a problem with latchup.   

So, you "have dabbled". Clearly you don't know what SCR latchup is - and you can't even be bothered to look it up. No wonder you don't see any difficulties.

I've never had a problem walking into the road without looking.

The parts OP is working with are 5V technology, combined with the slow slew rates and low clock rates,  the margins are huge and easy to work with.  Even on a breadboard.   

Please remove the adjectives and replace them with engineering terms, i.e. numbers.

Do a back of the envelope calculation to get a feel for the voltages that will be present in a well implemented board and on a board solderless breadboard construction. It isn't difficult - I learned the physics at school when I was 16.

I've used some of the Motorola parts.  These old 8-bit ones where the workhorses of the time.

Shrug. Some common families were infamous for SCR latchup. But you wouldn't know that because you choose not to look.

[jdutky]

When you buy the "big bag of ...", you are getting "floor sweepings".  These are devices that are so far out of spec that they simply can't sell them as real parts.  A lot of people swear by these grab bags but I'm of the opinion that I would rather have compliant parts from a reputable source - like DigiKey or Mouser.

Decent 0.1 ufd ceramic 10% capacitors tend to cost about $0.25 each.  You will most commonly see -20% +80% but they can be as good as 1%

10%:
https://www.digikey.com/en/products/detail/murata-electronics/RDER71H104K0S1H03A/4772307

5% are a lot more expensive but you only need a couple:

https://www.digikey.com/en/products/detail/tdk-corporation/FG26C0G1H104JNT06/5812001

For general decoupling, -20% +80% is typical:

https://www.digikey.com/en/products/detail/vishay-beyschlag-draloric-bc-components/K104Z15Y5VE5TL2/286602

Note that the -20% +80% isn't a lot cheaper than the +-10%

I never buy parts in grab bags and I don't buy from China either.  I have enough complications without using floor sweepings.

I have also found a significant difference in the capacitance measured by my two multi-meters that have a capacitor mode. Truth is an elusive beast.

If I want to get good quality capacitors and resistors, are there better sources than Digi-Key or Mouser? I've been buying cheap stuff off Amazon and JameCo because I'm just noodling around and don't want to spend too much for that, but I also plan to do some restoration work (on a bunch of my father's and grandfather's old test equipment) and some building of useful stuff, both of which I would like to have quality components for.

[jdutky]

I"m going to call this success, even though I'm not sure that the high and low times should be that asymmetric. I need to give the datasheet a good close read for the timing parameters (the diagram looks very symmetrical, but I glossed over the actual values). I tried (and succeeded and failed, in that order) to build a Colpitts oscillator (because I have a bunch of inverters lying around that this circuit isn't using, so why not?), and I found a source for the MC6875 which (presuming the chips aren't counterfeit) makes all of this merely an academic exercise.

Anyhow, here's the finished circuit and the scope traces (again, I omitted the MRDY section of the circuit, so those chips are a 74LS04 hex inverter on top, and a 74LS76 dual JK flip-flop on the bottom). Now I should be able to hook up the CPU, feed it hard-wired NOPs, and watch the address lines count up (the upper bits, at least. Maybe I should run it a really low clock speed for my first pass, though I expect you might still be able to see the counting if only as LED brightness on different address lines).

UPDATE: No, I take it back, this is NOT success. The datasheet clearly shows that the clock signals are symmetric and that they overlap high and low periods, just that Q transitions lead the corresponding E transitions by 100 ns. I've got to put this circuit on paper, understand EXACTLY what it's supposed to be doing, and figure out where I've gone wrong.

[tggzzz]

UPDATE: No, I take it back, this is NOT success. The datasheet clearly shows that the clock signals are symmetric and that they overlap high and low periods, just that Q transitions lead the corresponding E transitions by 100 ns. I've got to put this circuit on paper, understand EXACTLY what it's supposed to be doing, and figure out where I've gone wrong.

It is good to see somebody that verifies and thinks. Too many people do neither

[joeqsmith]

So, you "have dabbled". Clearly you don't know what SCR latchup is - and you can't even be bothered to look it up. No wonder you don't see any difficulties.

I've never had a problem walking into the road without looking.

Strange post. While it may be clear to you what I do and do not know, it seems rather delusional.   

Please remove the adjectives and replace them with engineering terms, i.e. numbers.

This information is easy to come by.  You or anyone else could look it up if you are interested.   

Shrug. Some common families were infamous for SCR latchup. But you wouldn't know that because you choose not to look.

All I stated was that I have never had a problem with it which is true.   

Do you find it hard to believe that students were required to build such a project and show it working as part of their education?  Maybe using an old analog scope with 10X probes to pull it off is what you can't grasp.  Maybe you can't believe it was done on a breadboard.    All I can offer is that was common.   

[joeqsmith]

I"m going to call this success, ....

UPDATE: No, I take it back, this is NOT success. ...
I've got to put this circuit on paper, understand EXACTLY what it's supposed to be doing, and figure out where I've gone wrong.

If you want help, I suggest posting a schematic of each circuit you are constructing.  It would make tracing it out or finding design problems easier.  Also, being able to see the part numbers on the ICs may help. 

[jdutky]

UPDATE: No, I take it back, this is NOT success. The datasheet clearly shows that the clock signals are symmetric and that they overlap high and low periods, just that Q transitions lead the corresponding E transitions by 100 ns. I've got to put this circuit on paper, understand EXACTLY what it's supposed to be doing, and figure out where I've gone wrong.

It is good to see somebody that verifies and thinks. Too many people do neither

I've done enough of neither to learn that some of at least one or the other alleviates a great deal of frustration.

[jdutky]

I"m going to call this success, ....

UPDATE: No, I take it back, this is NOT success. ...
I've got to put this circuit on paper, understand EXACTLY what it's supposed to be doing, and figure out where I've gone wrong.

If you want help, I suggest posting a schematic of each circuit you are constructing.  It would make tracing it out or finding design problems easier.  Also, being able to see the part numbers on the ICs may help. 

The circuit I'm trying to construct is this one from page 4-309 of the MC68B09E datasheet found on the JameCo site (https://download.siliconexpert.com/pdfs/2009/11/4/3/43/0/461/jamco_/manual/320590mot.pdf), but there is a more common version of the MC6809E datasheet (https://colorcomputerarchive.com/repo/Documents/Datasheets/MC6809E%20HMOS%208%20Bit%20Microprocessor%20(Motorola).pdf) that has a very slightly different version of of the circuit on page 12. The specifications for the clock signal are found on page 4-300 (JameCo)/3 (others). I have attacked screen shots of the relevant portions of both datasheets below (first JameCo, then the other common one). The main difference between the two circuits appears to be the substitution of a 74LS04 inverter in place of the transistor driving one of the output signals in the lower right, but I have not exhaustively compared the two figures, so I may have missed something subtle.

There is not much I can do to make the printing on the chips more visible, but I have found that viewing the chip at a shallow angle can make the printing easier to see. I will try to get pictures of the circuit that reveal the printing on the chips and attach them to a subsequent comment.

[jdutky]

Here are the images of the current circuit, and low angle close-ups of the chips that reveal the part numbers. I had to modify the circuit in order to photograph it: I removed the bypass capacitor that straddles the lower chip (the 74LS75A) across pins 5 and 13.

[jdutky]

I have been worrying that some of these chips might be counterfeits, but I specifically tested both chips out of circuit and they both appear to behave as their designated parts (a set of inverters and a pair of JK flip-flops). The 74LS76A differs from the 74LS76 in that the LS is triggered on the negative (falling) clock edge, and the regular 74LS76 is triggered on the positive (rising) clock edge. There is some verbiage about when signals on the J and K inputs need to be valid compared to the trigger edge, bu I can't see how that would change the specific behavior of this circuit (other than to shift the entire output signal by 90 degrees from the input clock, which I don't think should matter for the shape and timing of the generated clock signals).

[tggzzz]

So, you "have dabbled". Clearly you don't know what SCR latchup is - and you can't even be bothered to look it up. No wonder you don't see any difficulties.

I've never had a problem walking into the road without looking.

Strange post. While it may be clear to you what I do and do not know, it seems rather delusional.   

In isolation - because you deliberately snipped the context - it does look strange. But reinsert the context and it makes sense. Now, why did you remove the context? Here is the context:

I can recall one time where I had to solve someones timing violation back in those days.   I don't know what a voltage outage would be.  Loss of one of the power rails?   If so, I don't see the problem.   I have never had a problem with latchup.   

Please remove the adjectives and replace them with engineering terms, i.e. numbers.

This information is easy to come by.  You or anyone else could look it up if you are interested.   

Then I suggest you state your presumptions and do the calculation. It looks like you would be surprised by the result.

I have done that several times elsewhere on this forum.

Shrug. Some common families were infamous for SCR latchup. But you wouldn't know that because you choose not to look.

All I stated was that I have never had a problem with it which is true.   

And as useful/useless as my comment about walking into the road without looking - which is also true.

Do you find it hard to believe that students were required to build such a project and show it working as part of their education?  Maybe using an old analog scope with 10X probes to pull it off is what you can't grasp.  Maybe you can't believe it was done on a breadboard.    All I can offer is that was common.   

Maybe you can't believe problems with solderless breadboards are common, for sound theoretical and practical reasons. 

[tggzzz]

The circuit I'm trying to construct is this one from page 4-309 of the MC68B09E datasheet found on the JameCo site (https://download.siliconexpert.com/pdfs/2009/11/4/3/43/0/461/jamco_/manual/320590mot.pdf), but there is a more common version of the MC6809E datasheet (https://colorcomputerarchive.com/repo/Documents/Datasheets/MC6809E%20HMOS%208%20Bit%20Microprocessor%20(Motorola).pdf) that has a very slightly different version of of the circuit on page 12. The specifications for the clock signal are found on page 4-300 (JameCo)/3 (others). I have attacked screen shots of the relevant portions of both datasheets below (first JameCo, then the other common one). The main difference between the two circuits appears to be the substitution of a 74LS04 inverter in place of the transistor driving one of the output signals in the lower right, but I have not exhaustively compared the two figures, so I may have missed something subtle.

Look at the "DC Electrical Characteristics" table on p2, and the "Clock Inputs E Q" on p9.

The E input is not TTL compatible, and will require very careful attention to signal integrity.

The MC6875 was a clock driver for the 6800, which had similar clock voltage constraints.

[jdutky]

Look at the "DC Electrical Characteristics" table on p2, and the "Clock Inputs E Q" on p9.

The E input is not TTL compatible, and will require very careful attention to signal integrity.

The MC6875 was a clock driver for the 6800, which had similar clock voltage constraints.

Ah, so that's why we have a pull-up to +5V on the E-to-processor output signal, to raise the output high level to something higher than "normal TTL" high. I had been wondering about that detail, as no other outputs had pull-up resistors. I would appear that a close reading of the datasheets is not merely beneficial, but absolutely necessary.

Looking at the schematic I have for the 6800-based HEP-KIT Educator II (A 6800-based microcomputer education kit from the late 70s which partly incited my desire to build a 6809-based computer) I see that they also have a pair of flip-flops ("dual mono-stable multi-vibrator") and a couple of 74L04s (half the chips in the HEP-KIT are generic parts, and the other half, e.g. the MPU, RAM and ROM, are custom labeled parts almost impossible to look up on the web today. If my father had not annotated the manual with the actual part numbers I would be completely lost). The flip-flops are arranged similarly to what is shown in the 68090E datasheets, are annotated to produce input for the two-phase clock inputs to the CPU, and (both) have pull-ups to +5V.

I'm currently setting up a test harness to verify that the 74LS76A behaves entirely the way that I expect it does. I'm not too concerned that the chip is counterfeit, but I'm still a little concerned that something else about the 76A versus the 76 is causing a subtle problem.

[tggzzz]

When reading data sheets, it is necessary understand what they aren't saying and/or omit to say.

Personally I would use a modern CMOS device to drive the E&Q. The CMOS devices available when the 6809 was first introduced weren't fast enough.

[jdutky]

When reading data sheets, it is necessary understand what they aren't saying and/or omit to say.

Personally I would use a modern CMOS device to drive the E&Q. The CMOS devices available when the 6809 was first introduced weren't fast enough.

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

I want to start working with CMOS chips, but was waiting until I got my "sea legs" with TTL, which I understand to be more forgiving and easier to handle. There are an entire series of CMOS devices (4000/14000 series devices) as well as CMOS versions of the 74-series (74Cxx, 74HCxx, and 74HCTxx). From reading the datasheets at least the HCT versions seem to be completely compatible with other TTL parts, but I don't trust my inferences from random statement random datasheets.

All of my printed reference material, along with a fair bit of my inventory, is at least 20 years out of date, if not twice that, so I have no idea what is still relevant.

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

I'm just a ball of questions and ignorance whose only saving grace is some minimal insight into his condition.

[tggzzz]

When reading data sheets, it is necessary understand what they aren't saying and/or omit to say.

Personally I would use a modern CMOS device to drive the E&Q. The CMOS devices available when the 6809 was first introduced weren't fast enough.

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

I want to start working with CMOS chips, but was waiting until I got my "sea legs" with TTL, which I understand to be more forgiving and easier to handle. There are an entire series of CMOS devices (4000/14000 series devices) as well as CMOS versions of the 74-series (74Cxx, 74HCxx, and 74HCTxx). From reading the datasheets at least the HCT versions seem to be completely compatible with other TTL parts, but I don't trust my inferences from random statement random datasheets.

All of my printed reference material, along with a fair bit of my inventory, is at least 20 years out of date, if not twice that, so I have no idea what is still relevant.

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

I'm just a ball of questions and ignorance whose only saving grace is some minimal insight into his condition.

That's too long for a full answer. Fundamentals: all have outputs that are compatible with TTL input levels. "4000"=original wide voltage and slow, "H"= fast(er), "C"=CMOS version of TTL function, "T"=inputs that are compatible with TTL output levels.

Full answers are easy to find on the web and in application notes, or see TAoE 3

[joeqsmith]

Do you find it hard to believe that students were required to build such a project and show it working as part of their education?  Maybe using an old analog scope with 10X probes to pull it off is what you can't grasp.  Maybe you can't believe it was done on a breadboard.    All I can offer is that was common.   

Maybe you can't believe problems with solderless breadboards are common, for sound theoretical and practical reasons.

I can believe that any circuit built using any technique can be prone to problems.  It depends a lot on the skills of the people doing the work. 

[Electro Fan]

When reading data sheets, it is necessary understand what they aren't saying and/or omit to say.

Personally I would use a modern CMOS device to drive the E&Q. The CMOS devices available when the 6809 was first introduced weren't fast enough.

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

I want to start working with CMOS chips, but was waiting until I got my "sea legs" with TTL, which I understand to be more forgiving and easier to handle. There are an entire series of CMOS devices (4000/14000 series devices) as well as CMOS versions of the 74-series (74Cxx, 74HCxx, and 74HCTxx). From reading the datasheets at least the HCT versions seem to be completely compatible with other TTL parts, but I don't trust my inferences from random statement random datasheets.

All of my printed reference material, along with a fair bit of my inventory, is at least 20 years out of date, if not twice that, so I have no idea what is still relevant.

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

I'm just a ball of questions and ignorance whose only saving grace is some minimal insight into his condition.

Might be too basic but maybe something in here useful:
https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-voltage-levels/

[joeqsmith]

There is not much I can do to make the printing on the chips more visible, but I have found that viewing the chip at a shallow angle can make the printing easier to see. I will try to get pictures of the circuit that reveal the printing on the chips and attach them to a subsequent comment.

I was thinking you could just mark up the layout on paper (showing  the chip placement) and take a picture of it. 

Is this something like what you are attempting to make?   It appears this was the only post they made before moving onto another project.   


Or maybe something like this?



We used 3M boards back then.  I really have no experience with modern boards.   Watching the video now and it seems like it may provide you with some insight.     

[tggzzz]

Do you find it hard to believe that students were required to build such a project and show it working as part of their education?  Maybe using an old analog scope with 10X probes to pull it off is what you can't grasp.  Maybe you can't believe it was done on a breadboard.    All I can offer is that was common.   

Maybe you can't believe problems with solderless breadboards are common, for sound theoretical and practical reasons.

I can believe that any circuit built using any technique can be prone to problems.  It depends a lot on the skills of the people doing the work.

That statement gives no useful information, let alone information that can guide someone, e.g. beginner such as the OP.

If you want useful information that guides people away from known problems then, in this case, do the calculations you have said are 'easy to come by".

[rstofer]

Okay, that brings up a topic I've been hesitating to broach: what's the deal with the different CMOS families?

Will I be able to work with CMOS devices easily? Can they be mixed with TTL devices? What do the different family indicators mean?

Read this...  Then read it again!  Notice that combinational logic isn't available for every family, even within simple CMOS families.

https://www.ti.com/lit/sg/sdyu001ab/sdyu001ab.pdf

Some logic families are for low voltage (less than 5V) the CD4xxx CMOS family will generally, an usually, run at higher than 5V.  Some are faster than others.

Personally, I would stay with 74LSxxx even though it consumes a LOT more power.  This is based on my limit of about 100 chips for a wire-wrap project.  The total power would still be reasonable.

Actually, I have pretty much given up on discrete logic and prefer to use FPGAs.  I don't, but if I wanted to, I could code the HDL to match the specs of any logic device (timing would vary but that's easily handled) and then instantiate the project as interconnected logic gates.  I wouldn't recommend that approach but it would certainly work.

Even in the FPGA world, I still need to deal with the fact that the outside world may not run at 1.8V or 3.3V and level translators may be required.