On the finalized version I want to use a BeMicro CV (Cyclone V) because it has 1GB DDR3 and microSD. Plus it's only $50.
But my plan is to use the DE0-Nano (Cyclone IV) to start with and convert the capture data directly and convert it to VGA to know that I'm getting the right data since I already have a DAC that can handle the output part:
Seems I need to feed the sync from the Saturn into the FPGA to derive the HSync and VSync, (unless I go for the hardware approach) to drive the SuperScan device. Also I have to take those vertical sync pulses to generate a VGA compatible VSync. So that will take 3 pins.
Once that is done then test the composite output of the SuperScan to make sure it's locking into the signal. I should be able to see the image on a TV via composite indicating that the board is locking into the signal.
To capture the data from the SuperScan, so far I have two routes, one is to tap directly into the capture chip (TDA8707), the other is to tap into the FIFO output.
If I go for the FIFO approach I need 40 pins all 4 memory modules (8 for data+2 for read input clock and the read clock input per memory module).
If I go for capturing directly from the chip I need 6 bits per color (18 total) plus one for the ADC clock to know when there is data so that's only 19 pins.
Also I need one to get the synch signal in and 2 for the HSynch VSync to drive the capture board as explained earlier so add 3 to either case.
I could use my other bigger devboard (Cyclone V GX starter kit) but then i'm restricted on GPIOs unless I buy a module that adds 3 40 ping GPIO headers, that I will eventually get but not yet.