BTW, there is one approach to current sources that I want to try. FETs inherently limit current in saturation region. So, say, jfets of depletion fets can just limit current with a source resistor driving gate.
What I learned recently is that enhancement fets are not very different from depletion fets, they just have an offset in "Id vs Vgs" curve. That makes them not suitable for simple current source (fet+resistor). However, with an opamp we can add an offset voltage to compensate for that. I attached the circuit (set C8 to a higher value, like a few uF, it has to be big to "hold" the voltage during transients). So, it's basically a typical current source, but it's extremely fast as it relies on inherent mosfet characteristics for performance, opamp can be very slow. I checked the circuit with a 3kHz BW opamp in LTSpice, it showed very fast step response (but long settling time because of 3kHz opamp). So, as long as mosfet in saturation, it works well.
I'm not sure it's suitable for large currents, but works very well in simulator for small currents. I'm going to build it as I don't trust simulation results. Also not sure if it's suitable for anything above, say, 50mA, but I'll try. Looking at Id vs Vgs curvatures for a few transistors I have at hand, it should work reasonably well for Vds more than a volt or two. Attached is curves for IRFZ24N .
Edit: added better clarifications.