Author Topic: CMOS inverter output ?  (Read 1425 times)

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Offline AnuITopic starter

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CMOS inverter output ?
« on: October 01, 2018, 05:59:46 pm »
Hi all,

I have two questions regarding inverter output.

1) what if i remove the Vdd from CMOS inverter and my input is still present. What ll be the output?
    I think it will be X, but dont know? please help

2) what if my input is X and vdd is applied??


Please help. Would appreciate.

Thanks
 

Offline schmitt trigger

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Re: CMOS inverter output ?
« Reply #1 on: October 01, 2018, 06:11:20 pm »
If you remove power from the IC, any IC for that matter, and then apply an input signal, the behavior would be totally unpredictable.

What I have seen is, if the signal source has sufficiently low impedance and there is sufficient decoupling capacitance, the IC and perhaps other ICs, will continue to be powered thru the protection diodes.
But again......The circuit behavior will be unpredictable.

Whether the poor IC will survive the ordeal, that is a different matter.
 

Offline AnuITopic starter

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Re: CMOS inverter output ?
« Reply #2 on: October 02, 2018, 03:15:24 am »
Thanks Schmitt trigger.

But i am looking for something different.

Its like if I remove power supply of CMOS inverter or NAND gate the output goes X.
I want to know how. Basic inverter analysis kind of explaination.

Thanks
 

Online Zero999

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Re: CMOS inverter output ?
« Reply #3 on: October 02, 2018, 01:23:15 pm »
Thanks Schmitt trigger.

But i am looking for something different.

Its like if I remove power supply of CMOS inverter or NAND gate the output goes X.
I want to know how. Basic inverter analysis kind of explaination.

Thanks
A basic inverter analysis explanation is not applicable because it depends on the type of circuitry used to make the inverter.

My guess is, if the CMOS inverter IC's VDD terminal is unconnected, the VSS pin is at 0V, the input is high, what's driving it can supply enough power and there isn't much of a load on the inverter's output, it will power the CMOS IC via the ESD protection diodes and the output will be low impedance, low. If the input is low, there's nothing connected to the other inputs, the CMOS inverter IC's VDD terminal is unconnected and its VSS pin is at 0V, then its output will be high impedance, floating.

http://www.nutsvolts.com/magazine/article/understanding_digital_logic_ics_part_4

If you don't know what low impedance, low and high impedance floating is, with respect to CMOS logic, then look up tristate CMOS outputs.
 


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