Calculating Accuracy of Basic ADC Circuit

[bitshift]

Hey guys,

I'm trying to calculate the accuracy of a basic circuit depicted in the following schematic:



A sine wave with a 250V amplitude and a 2.5V DC bias is attenuated by a factor of 101 by the resistor divider. The signal is then fed into a 12 bit ADC with a 5V reference.

I would like to calculate the accuracy of this system with the following component specs:

Resistors

• 1% tolerance
• 25 ppm per degree C tempco
• -25 to 85 degrees C

Voltage Reference

• 1% initial accuracy
• 20 ppm per degree C tempco
• -25 to 85 degrees C

ADC

• +- 1 LSB INL
• Ignore offset and gain errors

The error calculation for the voltage going into the ADC is as follows:

Worst case resistance deviation = (1/100 + (85 - 25) * 25e-6) = 0.0115 or 1.15% // (where 1/100 is for 1% tolerance and (85 - 25) * 25e-6 is for temperature drift)
Voltage into ADC = R2(1 - 0.0115) / (R1(1 + 0.0115) + R2(1 - 0.0115)) * Vin // Errors are given opposite signs for maximum deviation in the ratio of the resistors.


The maximum error in the reference voltage would be:

Worst Case Error in Reference Voltage = 5 * (1/100 + (85 - 25) * 20e-6) = 0.0262V

I get lost when trying to calculate the total error. I am unsure how to tie in the error from the voltage reference to the +- 1 LSB INL of the ADC. How would one go about computing the total error?

[JoeN]

I am not an expert but I will say it seems you are telling the simulation that your reference is only good to 1%.  1% is going to be a big error margin for even a lowly 12 bit ADC.  That's 2048/100 = 20 LSBs, right?  Who cares if the ADC is accurate to 1 LSB if your reference is off by 20 LSB.  Now, of course if that is a really decent reference like an ADR45xx, ADR4xx (or equivalent from Linear, TI, etc) you can trim it to a very accurate and stable voltage far better than 1% (probably better than .01%) with an op-amp and I am sure make it better than that 12 bit ADC.  Then the ADC will be the limiting factor, not the reference.  Then I think you would want to provide the simulation with the real error margin on your reference for calculation.

Just a guess.

[michaeliv]

Ex: Your voltage is 100.000000V

You are looking for the worst case scenario which would happen if:

Temperature is at 85c - Tolerance of resistors becomes 1.0115%
R1 is 1011500 Ohm
R2 is 9885 Ohm

- Voltage is now 0.968v , 3.2% off of expected 1V

Voltage reference Is 1.0112% including temp coefficient, voltage is 5.056 instead of 5v
Your ADC will measure the voltage and find it to be 0.1914556962 of the reference voltage and it will ideally report it as 784 out of the 4096 steps it has.
But because it has 1 LSB accuracy, it will report it as 783.
You will interpret the result as 783/4096 * 5v = 0.955810545, which give you a total error of 4.4189455%

PS that's not the worse case, but very close to it. To find the worse case, you need to increase the input voltage a bit above 100V (and have the output remain the same). Then you will get the maximum error.

[JoeN]

4096 steps not 2048, sorry, I got was off by one power there.

[bitshift]

Thank you for the explanation michaeliv

Following the same example with a much smaller voltage:

Voltage = 10V

Due to tolerance in resistors voltage into the ADC is now 0.0968v , 3.2% off of expected 0.1V.
With the voltage reference at the worst case 5.056V the ADC will see 0.0191455696202532 of the reference voltage. It will report 78/4096 but because of the +- 1 LSB INL it will report 77/4096. The result will be interpreted as 5 * 77 / 4096 = 0.093994140625V making the error roughly 6%.

This makes sense to me since as the voltage at the ADC gets closer to 0, the +- 1 LSB INL will make a larger and larger impact on the measured voltage. How would you then characterize the error of the entire system?

To give a bit more context, I'm using this scheme to measure the RMS voltage of the sine wave. I would like to write down equations for the errors to aid in choosing components to meet a spec. 

[michaeliv]

So, If I'm understanding it correctly, you're sampling the sine wave and trying to calculate the RMS voltage from multiple samples ?
The max error then depends on more things, like the sampling rate of the ADC.
Ex if your sampling rate is the same or less than the AC frequency, the max error will be 100% since you might be measuring only exactly when the sine wave goes through 0.
It also depends on the formula you're using - Bigger % errors at smaller voltages won't contribute too much to the result ... depending on how the formula handles them.

Also, you can improve the accuracy by not dividing the voltage by 100, but by 50-60, to maximize the usage of the ADC's range.
For your current design the accuracy would be 4.2721519% (if the ADC had infinite precision + bit depth).
So your total accuracy would be 4.2721519% + 1/4096 * ADC reference * resistor divider ratio =

4.2721519% + 1.22070312mV * 100
4.2721519% +- 0.122070312V

[bitshift]

Thanks michaeliv, I appreciate your help so far.

So, If I'm understanding it correctly, you're sampling the sine wave and trying to calculate the RMS voltage from multiple samples ?

Yes

The max error then depends on more things, like the sampling rate of the ADC.
Ex if your sampling rate is the same or less than the AC frequency, the max error will be 100% since you might be measuring only exactly when the sine wave goes through 0.

From my (very) limited understanding of the Nyquist sampling theorem, to faithfully measure the sine wave I need to sample it at a minimum of twice its frequency. In this case it's just a 50Hz sine wave so I will sample it at a frequency of at least 100Hz.

It also depends on the formula you're using - Bigger % errors at smaller voltages won't contribute too much to the result ... depending on how the formula handles them.

Aaah this makes sense. The RMS voltage will be calculated using this formula:



How do you calculate the total error in the RMS voltage knowing that the error depends on the voltage level?

Also, you can improve the accuracy by not dividing the voltage by 100, but by 50-60, to maximize the usage of the ADC's range.

In this case I am using 100% of the range of the ADC already. The sine wave is DC biased around 2.5V with a max peak of 250V.

For your current design the accuracy would be 4.2721519% (if the ADC had infinite precision + bit depth).
So your total accuracy would be 4.2721519% + 1/4096 * ADC reference * resistor divider ratio =

4.2721519% + 1.22070312mV * 100
4.2721519% +- 0.122070312V

How did you get 4.2721519%?

[michaeliv]

From my (very) limited understanding of the Nyquist sampling theorem, to faithfully measure the sine wave I need to sample it at a minimum of twice its frequency. In this case it's just a 50Hz sine wave so I will sample it at a frequency of at least 100Hz.

Disclamer: I'm not familiar with advanced maths  . 
But a 100Hz sine wave goes through 0V 100 times a second, so you might be sampling it exactly when it goes through 0 twice.
But that does not really matter since it assumes that the sampling of your ADC is instantaneous.
Assuming that the ADC takes some time to sample the voltage (which is likely since it's only 100hz ?) - to find the exact /100% correct  accuracy of the real-world system you would have to do some very complex mathematics which involves the sine wave + knowledge of the internal architecture of the ADC, beyond what is in it's datasheet. This is because the ADC takes some time to measure the voltage - during which the voltage changes -- this can cause inaccurate measurements due to the architecture of the ADC.
Basically, the datasheet of the ADC assumes that the input voltage is constant throughout the sampling period. Since it's not, the actual voltage that the ADC reports might be an average of the voltage during the sample period, or a value at a specific point in time during the conversion.
BTW since you know it's a sine wave, why don't you just convert it to DC and measure the voltage and work your way back to the AC voltage ?

In this case I am using 100% of the range of the ADC already. The sine wave is DC biased around 2.5V with a max peak of 250V.

Yup, you're right, I missed that.

How did you get 4.2721519%?

It's from the previous "With the voltage reference at the worst case 5.056V the ADC will see 0.0191455696202532 of the reference voltage..."
0.0191455696202532  is  4.2721519% off from the expected 0.02V.

[Jeroen3]

An SAR ADC, the ones likely to be used if only 12 bit, contain a sample and hold. There is only a small moment in time the ADC is open to the input pin. That is when the sample&hold is refreshing. Next, the ADC completes a conversion in several uS.
The input pin is not directly connector to the converter.

I've just recently played around with 50 Hz signal input into the ADC, do some filtering, and DAC output.
It looks like this, with 1Khz samplerate.

There is no challenge in rectifying the signal. It moves the measurement to the analog domain, requiring more components and calibration. But it is easier.

You can already software rectify to get the pk-pk values and calculate back to rms. Determining the frequency requires more than an fs of 1 kHz. At least if you don't want to average the frequency over a longer period of time.

[BravoV]

Assuming its not for education or fun in building this RMS converter from the scratch, why not using RMS -> DC converter chip ? There are plenty of choices out there.

[tszaboo]

You forgot input protection. Go back to the drawing table, and design it there. It makes a huge difference. Leakage current of a small signal low leakage diode, a TVS diode. It can dominate the error sources.

[bitshift]

Assuming its not for education or fun in building this RMS converter from the scratch, why not using RMS -> DC converter chip ? There are plenty of choices out there.

This is for fun. I'm building a digital wattmeter but I would like to keep it as low cost as possible

You forgot input protection. Go back to the drawing table, and design it there. It makes a huge difference. Leakage current of a small signal low leakage diode, a TVS diode. It can dominate the error sources.

Something like this after the resistor network?

[Jeroen3]

Also, the drawing above lacks an input buffer for the ADC. Go from the resistor divider to diodes, add some c's, and then into the opamp to create a low enough impedance signal for the ADC. Don't forget your anti-aliasing filter at 0.5*fs.

[f5r5e5d]

much higher sample rates are used in practical circuits

oversampling simplifies the anti-alias input filter design, reduces sinc error if your math assumes ZOH, more samples averaged can reduce noise...

and the processing power to do smarter algorithms with more data is cheap today

[bitshift]

Also, the drawing above lacks an input buffer for the ADC. Go from the resistor divider to diodes, add some c's, and then into the opamp to create a low enough impedance signal for the ADC. Don't forget your anti-aliasing filter at 0.5*fs.

Forgive me for asking a potentially silly question but why is it important for the ADC to see a low impedance signal. Is it so that enough current can flow to charge the sample and hold capacitor?

EDIT:

This is answered in the datasheet of a microchip ADC I'm using:

For the A/D converter to meet specification, the charge
holding capacitor (CSAMPLE) must be given enough
time to acquire a 12-bit accurate voltage level during
the 1.5 clock cycle sampling period. The analog input
model is shown in Figure 4-1.

In this diagram, it is shown that the source impedance
(RS) adds to the internal sampling switch (RSS) impedance, directly affecting the time that is required to
charge the capacitor, CSAMPLE. Consequently, larger
source impedances increase the offset, gain, and
integral linearity errors of the conversion.

Ideally, the impedance of the signal source should be
near zero. This is achievable with an operational
amplifier such as the MCP601 which has a closed loop
output impedance of tens of ohms. The adverse affects
of higher source impedances are shown in Figure 4-2.

[dmills]

There is one other elephant in the room.

You say you are measuring the RMS value of a 50Hz sine? Would this be derived from the mains by any chance?

The mains has non negligible voltage harmonic distortion (And loads often have major harmonic current content), so you probably want to be measuring out to at least the 10th harmonic, so maybe a 2KHz sample rate or so.

If you were just measuring a literal sine wave, why would you bother doing complex RMS measurements, just measure the peak and calculate the RMS as you know the waveform.....

The condition of sufficiency in the sampling theorem is 'sample rate strictly greater then twice the bandwidth', 100Hz sampling a 50Hz signal does not suffice for this, 101Hz does, but the maths gets hairy.

Regards, Dan.

[Jeroen3]

The voltage fundamental is easily cherry picked with some filters.
With the current you should definitely take a look around the net for some scope images.
Although your current transformer already reject a lot of the high frequency noise. There is still a lot more than only 50 Hz in your signal.

Also, did you think of power factor measurement yet?

This is considered a clean sine: (green is current)

[bitshift]

There is one other elephant in the room.

You say you are measuring the RMS value of a 50Hz sine? Would this be derived from the mains by any chance?

It is derived from mains. I'm trying to build a wattmeter for fun/educational purposes.

The mains has non negligible voltage harmonic distortion (And loads often have major harmonic current content), so you probably want to be measuring out to at least the 10th harmonic, so maybe a 2KHz sample rate or so.

Thank you for this. I will take this into account and hopefully come up with a better device.

If you were just measuring a literal sine wave, why would you bother doing complex RMS measurements, just measure the peak and calculate the RMS as you know the waveform.....

This is a fair point. I'm going to change the scope of the device to measure the power factor as Jeroen3 suggested.

Thank you everyone for the help so far  Back to the drawing board