NPN common emitter amplifier for 10 MHz (complete post now)

[maelh]

Hello,

I am trying to simulate a minimal NPN common emitter amplifier for 10 Mhz, using a BC547C.

Looking at the datasheet it says:

Current − Gain − Bandwidth Product
(IC = 10 mA, VCE = 5.0 V, f = 100 MHz)
fT = 150MHz minimal, and 300MHz typical

I also drew the output characteristic curves using LTSpice (voltage supply 9V, Ib from 10µA to 250µA) with this circuit,

giving this plot:

From there I determined the active region to start at roughly Vce=440mV. So the output swing can go from 440mV to 9V without distortion, hence the operating point should be ideally at (9000mV-440mV) / 2 = 8560 mV / 2 = 4280 mV.


When chosing max(Ic)=45mA this gives me a resistor of 9V/45mA = 200 Ohm (not ideal but let's go with this for now). The range for Ib with the chosen DC load line is from about 10µA to 130µA, so the operating point for Ib = 70µA.

This results in the following circuit (10MHz current sine wave of 120µA peak to peak, with an offset of 70µA):


I intentionally used a current source and avoided input and output capacitors to be sure their added capacitance do not have any effect and used only one resistor Rc. So I suppose only the "built-in" capacitances of the NPN junctions affect the result.

As expected with kilohertz frequencies the result is a swing from almost 0V to 9V and as I go higher the swing reduces to 7V.
But for 1MHz and 10MHz there is a drastic change and barely any voltage at the output (about 300mV peak to peak).

The reduction seems much higher than expected given the mentioned GBWP from the datasheet.

Am I missing something?

Edit: Sorry it was unintentionally submitted before I was done writing the post.

[Zero999]

Your post appears to be incomplete.

Using what?

So you drew what?

Post a schematic and the .asc file, if you're using LTSpice.

The problem with a common emitter for high frequencies is the parasitic capacitance, between the base and emitter is multiplied by the gain, look up Miller effect, which reduces the impedance seen at the base, which reduces the gain.

[wasedadoc]

Your post appears to be incomplete.

Using what?

So you drew what?

Post a schematic and the .asc file, if you're using LTSpice.

The problem with a common emitter for high frequencies is the parasitic capacitance, between the base and emitter is multiplied by the gain, look up Miller effect, which reduces the impedance seen at the base, which reduces the gain.

A common emitter stage has no voltage gain between base and emitter.  It is the capacitance between base and collector that gets multiplied.

[Zero999]

Your post appears to be incomplete.

Using what?

So you drew what?

Post a schematic and the .asc file, if you're using LTSpice.

The problem with a common emitter for high frequencies is the parasitic capacitance, between the base and emitter is multiplied by the gain, look up Miller effect, which reduces the impedance seen at the base, which reduces the gain.

A common emitter stage has no voltage gain between base and emitter.  It is the capacitance between base and collector that gets multiplied.

Yes. I got that wrong. I should have said base and collector.

[maelh]

Sorry all, the post sent unintentionally before it was ready (as can probably be seen from the phrase interrupted in the middle). Please see the much more detailed post now.

[maelh]

The problem with a common emitter for high frequencies is the parasitic capacitance, between the base and emitter is multiplied by the gain, look up Miller effect, which reduces the impedance seen at the base, which reduces the gain.

I am aware of the Miller effect, which is why I am trying to make a minimal simulation where there is still a reasonable gain or compensate this effect, if possible.

The resulting voltage of only about 300mV peek to peek, seems too low even for 10Mhz.


Edit: I also attached the circuits given as screenshots in the first post.

[Zero999]

The current source has a very high impedance, which is dominated by the low base-emitter impedance. At higher frequencies, the Miller capacitance shunts the signal, lowering the base voltage and thus the output voltage.

Here's a bode plot. The base voltage, along with the output voltage starts to roll-off at around a 100kHz. Note there's about 40dB of voltage gain, all the way up to 100MHz.

[Zero999]

I had a play with LTSpice. This circuit is an emitter follower, connected to a common base amplifier. Note the input impedance drastically falls, with increasing frequency, due the the drop in h_FE.